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| author | Tom Rini <[email protected]> | 2025-08-28 07:54:38 -0600 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2025-08-28 07:54:38 -0600 |
| commit | 59d1ce83dd0be471d61e733b9b9c921a79a207f4 (patch) | |
| tree | 405ffd6dbc08fb591e69ade1d90407c5a9a69247 /doc/develop/python_cq.rst | |
| parent | 88938be302b2685c51ca7c3cb2b56cc15b5d5cb3 (diff) | |
| parent | a51b7dfc6fec0aa76367114af59a7114b040b090 (diff) | |
Merge tag 'xilinx-for-v2026.01-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
AMD/Xilinx/FPGA changes for v2026.01-rc1
mbv:
- Add it to CI loop
versal2:
- Wire UFS driver
serial:
- Add support for OF_PLATDATA in uartlite
misc:
- Mark some structures as const
Diffstat (limited to 'doc/develop/python_cq.rst')
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