diff options
| author | Conor Dooley <[email protected]> | 2022-10-25 08:58:47 +0100 |
|---|---|---|
| committer | Leo Yu-Chi Liang <[email protected]> | 2022-11-15 15:37:17 +0800 |
| commit | 88b697fb37432b95bd87525e718726607bdb2123 (patch) | |
| tree | b406040e16430ac1a14adc107b4f518847328d28 /doc/develop/python_cq.rst | |
| parent | 32cfdd51630506393ca078aa36fa70248d549109 (diff) | |
clk: microchip: mpfs: fix periph clk parentage
Not all "periph" clocks are children of the AHB clock, some have the AXI
clock as their parent & the mtimer clock is derived from the external
reference clock directly. Stop assuming the AHB clock to be the parent
of all "periph" clocks and define their correct parents instead.
Fixes: 2f27c9219e ("clk: Add Microchip PolarFire SoC clock driver")
Signed-off-by: Conor Dooley <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Reviewed-by: Padmarao Begari <[email protected]>
Tested-by: Padmarao Begari <[email protected]>
Diffstat (limited to 'doc/develop/python_cq.rst')
0 files changed, 0 insertions, 0 deletions
