summaryrefslogtreecommitdiff
path: root/doc/develop/python_cq.rst
diff options
context:
space:
mode:
authorJonas Karlman <[email protected]>2026-01-29 21:01:51 +0000
committerJerome Forissier <[email protected]>2026-02-06 16:42:45 +0100
commit8beb70f2309d6fd6abb1d5c539edab9b0934d656 (patch)
treeae6144a083d7d22174f149e8303097ed6124bdf8 /doc/develop/python_cq.rst
parent34c1ab534c69366d6eeb3d693a9afd37bd14aba5 (diff)
net: dwc_eth_qos: Start DMA and MAC after tail pointers are initialized
The DesignWare Cores Ethernet Quality-of-Service databook state that receive and transmit descriptor list address and also transmit and receive tail pointer registers should be initialized before the receive and transmit DMAs are started. It also state to enable the MAC receiver only after the DMA is active. Otherwise, received frames can fill the Rx FIFO and overflow. Move the activation of receive and transmit DMA and MAC receiver until after tail pointer registers have been initialized. Signed-off-by: Jonas Karlman <[email protected]>
Diffstat (limited to 'doc/develop/python_cq.rst')
0 files changed, 0 insertions, 0 deletions