diff options
| author | Duy Nguyen <[email protected]> | 2024-01-28 16:51:59 +0100 |
|---|---|---|
| committer | Marek Vasut <[email protected]> | 2024-02-10 17:08:06 +0100 |
| commit | ad005d8a77b182b2acfa79a7e92a99580773b01b (patch) | |
| tree | 8de8bba8dbef100b55301752d80c9cd4ecaf7523 /doc/develop/python_cq.rst | |
| parent | d7aaaf4223d0a2f9f8c9eed47d7431860b3116d8 (diff) | |
dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car
V4M (R8A779H0) SoC.
The current version is imported from:
https://lore.kernel.org/linux-renesas-soc/11acbd2a30b58607474e9c32eb798b3a00e85e73.1706194617.git.geert+renesas@glider.be/
Signed-off-by: Duy Nguyen <[email protected]>
Signed-off-by: Hai Pham <[email protected]>
Diffstat (limited to 'doc/develop/python_cq.rst')
0 files changed, 0 insertions, 0 deletions