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| author | Alistair Delva <[email protected]> | 2022-09-26 20:47:55 +0000 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2022-10-10 18:01:23 -0400 |
| commit | db9d55e2103351cfc8925aadaf5584fe84f61c9f (patch) | |
| tree | ed222f4adeea81c61a6272d192870b2e219a2050 /doc/develop/python_cq.rst | |
| parent | 0b943587d28763db7f277ba1c168d86b4dfca288 (diff) | |
spl: atf: Fix clang -Wasm-operand-widths warning
common/spl/spl_atf.c:187:51: warning: value size does not match register
size specified by the constraint and modifier [-Wasm-operand-widths]
__asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory");
^
common/spl/spl_atf.c:187:34: note: use constraint modifier "w"
__asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory");
^~
%w0
Use %x0 to match what Linux does in <asm/sysreg.h> write_sysreg().
Signed-off-by: Alistair Delva <[email protected]>
Cc: Kever Yang <[email protected]>
Cc: Michael Walle <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Nick Desaulniers <[email protected]>
Diffstat (limited to 'doc/develop/python_cq.rst')
0 files changed, 0 insertions, 0 deletions
