diff options
| author | Michael Walle <[email protected]> | 2022-05-30 23:02:07 +0200 |
|---|---|---|
| committer | Peng Fan <[email protected]> | 2022-06-20 15:52:45 +0800 |
| commit | 6bdda4b2003fadbcbcc28a1d395ec1f6f6557539 (patch) | |
| tree | 4fd174441b93ae79f561109b68f714bfa7d6227d /doc/develop | |
| parent | 2a9cf320afb051f40a4bbb98aa9a6b1a94332d27 (diff) | |
board: sl28: set CPO value
With a 8GiB memory board, it seems that the "very unlikely event" of a
DDR initialization with non-optimal values are not really that unlikely.
It happens in about every other reboot. As described in erratum
A-009942, preset the DEBUG_28 register with an optimal value. The value
iself depends on the memory configuration of the board, but the used
value seems to work well for all variants.
Signed-off-by: Michael Walle <[email protected]>
Diffstat (limited to 'doc/develop')
0 files changed, 0 insertions, 0 deletions
