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| author | Dinesh Maniyam <[email protected]> | 2023-12-15 15:15:19 +0800 |
|---|---|---|
| committer | Tien Fong Chee <[email protected]> | 2024-01-22 16:51:17 +0800 |
| commit | 9d8f814beb7f1857e814a42ec8362323ed88bdcc (patch) | |
| tree | 470ce4a501d7b16c7811df9736d72aecef27044a /doc/develop | |
| parent | 158d648d9f02c9ee0f432bbafeea38aaa55dd943 (diff) | |
clk: altera: n5x: Fix MEMCLKMGR_EXTCNTRST_C0CNTRST to bit(0)
MEMCLKMGR_EXTCNTRST_C0CNTRST register defined as BIT[0] in documentation
but it is wrongly defined as BIT[7] in u-boot code. This register is used
to hold associated pingpong counter in reset
while PLL and 5:1 mux configuration is changed.
Signed-off-by: Dinesh Maniyam <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
Diffstat (limited to 'doc/develop')
0 files changed, 0 insertions, 0 deletions