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authorPatrick Delaunay <[email protected]>2021-08-02 18:08:36 +0200
committerHeinrich Schuchardt <[email protected]>2021-08-14 20:54:41 +0200
commit551a959a8c11e7f3452e0c2f24db85dffebc1e91 (patch)
treee0fac2bab44a347e60596e176f22002517ddbb18 /doc/device-tree-bindings/mtd
parent6a055c0f91418b78949b901147a63f2a4e26c9ab (diff)
doc: stm32mp1: add page for device tree bindings
With device tree binding migration to yaml it is difficult to synchronize the binding from Linux kernel to U-Boot. Instead of maintaining the same dt bindings, this patch adds in the U-Boot documentation the path to the device tree bindings in Linux kernel for STMicroelectronics devices, when they are used without modification. Signed-off-by: Patrick Delaunay <[email protected]> Signed-off-by: Patrice Chotard <[email protected]> Add links for referenced text files. Signed-off-by: Heinrich Schuchardt <[email protected]>
Diffstat (limited to 'doc/device-tree-bindings/mtd')
-rw-r--r--doc/device-tree-bindings/mtd/stm32-fmc2-nand.txt61
1 files changed, 0 insertions, 61 deletions
diff --git a/doc/device-tree-bindings/mtd/stm32-fmc2-nand.txt b/doc/device-tree-bindings/mtd/stm32-fmc2-nand.txt
deleted file mode 100644
index ad2bef82658..00000000000
--- a/doc/device-tree-bindings/mtd/stm32-fmc2-nand.txt
+++ /dev/null
@@ -1,61 +0,0 @@
-STMicroelectronics Flexible Memory Controller 2 (FMC2)
-NAND Interface
-
-Required properties:
-- compatible: Should be one of:
- * st,stm32mp15-fmc2
-- reg: NAND flash controller memory areas.
- First region contains the register location.
- Regions 2 to 4 respectively contain the data, command,
- and address space for CS0.
- Regions 5 to 7 contain the same areas for CS1.
-- interrupts: The interrupt number
-- pinctrl-0: Standard Pinctrl phandle (see: pinctrl/pinctrl-bindings.txt)
-- clocks: The clock needed by the NAND flash controller
-
-Optional properties:
-- resets: Reference to a reset controller asserting the FMC controller
-- dmas: DMA specifiers (see: dma/stm32-mdma.txt)
-- dma-names: Must be "tx", "rx" and "ecc"
-
-* NAND device bindings:
-
-Required properties:
-- reg: describes the CS lines assigned to the NAND device.
-
-Optional properties:
-- nand-on-flash-bbt: see nand.txt
-- nand-ecc-strength: see nand.txt
-- nand-ecc-step-size: see nand.txt
-
-The following ECC strength and step size are currently supported:
- - nand-ecc-strength = <1>, nand-ecc-step-size = <512> (Hamming)
- - nand-ecc-strength = <4>, nand-ecc-step-size = <512> (BCH4)
- - nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8) (default)
-
-Example:
-
- fmc: nand-controller@58002000 {
- compatible = "st,stm32mp15-fmc2";
- reg = <0x58002000 0x1000>,
- <0x80000000 0x1000>,
- <0x88010000 0x1000>,
- <0x88020000 0x1000>,
- <0x81000000 0x1000>,
- <0x89010000 0x1000>,
- <0x89020000 0x1000>;
- interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rcc FMC_K>;
- resets = <&rcc FMC_R>;
- pinctrl-names = "default";
- pinctrl-0 = <&fmc_pins_a>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- nand@0 {
- reg = <0>;
- nand-on-flash-bbt;
- #address-cells = <1>;
- #size-cells = <1>;
- };
- };