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| author | Tom Rini <[email protected]> | 2022-03-28 12:36:49 -0400 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2022-03-28 12:36:49 -0400 |
| commit | 34d2b7f20369d62c0f091d6572a8c0ea4655cf14 (patch) | |
| tree | 0591ee99c118e0e196730b6ec6582986200e6313 /doc/device-tree-bindings | |
| parent | 7f0826c169ff14d62e92d02f85d33d0030d45c12 (diff) | |
| parent | e893e8ea6a5d3af312747d00f93587559193a426 (diff) | |
Merge tag 'v2022.04-rc5' into next
Prepare v2022.04-rc5
Diffstat (limited to 'doc/device-tree-bindings')
| -rw-r--r-- | doc/device-tree-bindings/mfd/canaan,k210-sysctl.txt (renamed from doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt) | 8 | ||||
| -rw-r--r-- | doc/device-tree-bindings/pinctrl/canaan,k210-fpioa.txt (renamed from doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt) | 12 | ||||
| -rw-r--r-- | doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt | 4 |
3 files changed, 12 insertions, 12 deletions
diff --git a/doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt b/doc/device-tree-bindings/mfd/canaan,k210-sysctl.txt index 5b24abcb62c..e48b164fc09 100644 --- a/doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt +++ b/doc/device-tree-bindings/mfd/canaan,k210-sysctl.txt @@ -6,7 +6,7 @@ be reference by other bindings which need a phandle to the K210 sysctl regmap. Required properties: - compatible: should be - "kendryte,k210-sysctl", "syscon", "simple-mfd" + "canaan,k210-sysctl", "syscon", "simple-mfd" - reg: address and length of the sysctl registers - reg-io-width: must be <4> @@ -15,18 +15,18 @@ Clock sub-node This node is a binding for the clock tree driver Required properties: -- compatible: should be "kendryte,k210-clk" +- compatible: should be "canaan,k210-clk" - clocks: phandle to the "in0" external oscillator - #clock-cells: must be <1> Example: sysctl: syscon@50440000 { - compatible = "kendryte,k210-sysctl", "syscon", "simple-mfd"; + compatible = "canaan,k210-sysctl", "syscon", "simple-mfd"; reg = <0x50440000 0x100>; reg-io-width = <4>; sysclk: clock-controller { - compatible = "kendryte,k210-clk"; + compatible = "canaan,k210-clk"; clocks = <&in0>; #clock-cells = <1>; }; diff --git a/doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt b/doc/device-tree-bindings/pinctrl/canaan,k210-fpioa.txt index 73871f59305..deca0cfab76 100644 --- a/doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt +++ b/doc/device-tree-bindings/pinctrl/canaan,k210-fpioa.txt @@ -5,10 +5,10 @@ in Kendryte K210 SoCs. Any of the 256 functions can be mapped to any of the 48 pins. Required properties: -- compatible: should be "kendryte,k210-fpioa" +- compatible: should be "canaan,k210-fpioa" - reg: address and length of the FPIOA registers -- kendryte,sysctl: phandle to the "sysctl" register map node -- kendryte,power-offset: offset in the register map of the power bank control +- canaan,sysctl: phandle to the "sysctl" register map node +- canaan,k210-power-offset: offset in the register map of the power bank control register (in bytes) Configuration nodes @@ -54,10 +54,10 @@ Notes on specific properties include: Example: fpioa: pinmux@502B0000 { - compatible = "kendryte,k210-fpioa"; + compatible = "canaan,k210-fpioa"; reg = <0x502B0000 0x100>; - kendryte,sysctl = <&sysctl>; - kendryte,power-offset = <K210_SYSCTL_POWER_SEL>; + canaan,k210-sysctl = <&sysctl>; + canaan,k210-power-offset = <K210_SYSCTL_POWER_SEL>; /* JTAG running at 3.3V and driven at 11 mA */ fpioa_jtag: jtag { diff --git a/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt b/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt index 8d2888fbe30..7a0f11c53bf 100644 --- a/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt +++ b/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt @@ -5,8 +5,8 @@ Required properties: - compatible : One of "altr,socfpga-spi", "altr,socfpga-arria10-spi", - "canaan,kendryte-k210-spi", - "canaan,kendryte-k210-ssi", + "canaan,k210-spi", + "canaan,k210-ssi", "intel,stratix10-spi", "intel,agilex-spi", "mscc,ocelot-spi", |