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| author | Samuel Holland <[email protected]> | 2022-11-28 01:02:27 -0600 |
|---|---|---|
| committer | Andre Przywara <[email protected]> | 2023-04-12 00:17:20 +0100 |
| commit | 7108dd24439375dafa3fcfab9415e930b0abb4b3 (patch) | |
| tree | 069e4887c8ae25ce2ff4720d888c85fbc14bbc7a /doc | |
| parent | 9e804638bfe2693a908abf066ff66c251572afa7 (diff) | |
video: sunxi: dw-hdmi: Use DM for clock gates and resets
This abstracts away the CCU register layout, which is necessary for
supporting new SoCs like H6 with a reorganized CCU. One of the resets is
referenced from the PHY node instead of the controller node, so it will
have to wait until the PHY code is factored out to a separate driver.
Signed-off-by: Samuel Holland <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Jernej Skrabec <[email protected]>
Diffstat (limited to 'doc')
0 files changed, 0 insertions, 0 deletions