Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into next

CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/23926

- Board: Support LicheeRV Nano
- Board: Support bananapi-f3
- Board: Switch to OF_UPSTREAM for StarFive JH7110
- Board: Add sdhci driver for TH1520 SoC

5 files changed, 189 insertions, 0 deletions

diff --git a/doc/board/index.rst b/doc/board/index.rst
index b54c1748d57..b1c470eb2cb 100644
--- a/doc/board/index.rst
+++ b/doc/board/index.rst
@@ -55,6 +55,7 @@ Board-specific doc
    sipeed/index
    socionext/index
    sophgo/index
+   spacemit/index
    st/index
    starfive/index
    ste/index
diff --git a/doc/board/sophgo/index.rst b/doc/board/sophgo/index.rst
index e097afdac64..26dba4a4851 100644
--- a/doc/board/sophgo/index.rst
+++ b/doc/board/sophgo/index.rst
@@ -6,3 +6,4 @@ Sophgo
    :maxdepth: 1
 
    milkv_duo
+   licheerv_nano
diff --git a/doc/board/sophgo/licheerv_nano.rst b/doc/board/sophgo/licheerv_nano.rst
new file mode 100644
index 00000000000..a75c6a37dc5
--- /dev/null
+++ b/doc/board/sophgo/licheerv_nano.rst
@@ -0,0 +1,72 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+LicheeRV Nano
+=============
+
+SG2002 RISC-V SoC
+-----------------
+The SG2002 is a high-performance, low-power 64-bit RISC-V/ARM SoC from Sophgo.
+
+Mainline support
+----------------
+The support for following drivers are already enabled:
+1. ns16550 UART Driver.
+2. Synopsys Designware MSHC Driver
+
+Building
+~~~~~~~~
+1. Add the RISC-V toolchain to your PATH.
+2. Setup ARCH & cross compilation environment variable:
+
+.. code-block:: console
+
+   export CROSS_COMPILE=<riscv64 toolchain prefix>
+   cd <U-Boot-dir>
+   make sipeed_licheerv_nano_defconfig
+   make
+
+This will generate u-boot.bin
+
+Booting
+~~~~~~~
+Currently, we rely on vendor FSBL (First Stage Boot Loader) to initialize the
+clock and load the u-boot image, then bootup from it.
+
+To run u-boot.bin on top of FSBL, follow these steps:
+
+1. Use mainline OpenSBI with a newer version than 1.5 to generate fw_dynamic.
+
+2. Generate a compatible u-boot.bin using U-Boot with the LicheeRV Nano default
+   configuration.
+
+3. Use the vendor-provided tool [1] to create a unified fip.bin file containing
+   FSBL, OpenSBI, and U-Boot.
+   Note that you will have to use the file cv181x.bin as the FSBL.
+
+2. Place the generated fip.bin file into the FAT partition of the SD card.
+
+3. Insert the SD card into the board and power it on.
+
+The board will automatically execute the FSBL from the fip.bin file.
+Subsequently, it will transition to OpenSBI, and finally, OpenSBI will invoke
+U-Boot.
+
+[1]: https://github.com/sophgo/fiptool
+
+
+Sample boot log from LicheeRV Nano board
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.. code-block:: none
+
+   U-Boot 2024.10 (Oct 24 2024 - 15:00:20 +0200)licheerv_nano
+
+   DRAM:  256 MiB
+   Core:  19 devices, 11 uclasses, devicetree: separate
+   MMC:   mmc@4310000: 0
+   Loading Environment from nowhere... OK
+   In:    serial@4140000
+   Out:   serial@4140000
+   Err:   serial@4140000
+   Net:   No ethernet found.
+   Hit any key to stop autoboot:  0
+   licheerv_nano#
diff --git a/doc/board/spacemit/bananapi-f3.rst b/doc/board/spacemit/bananapi-f3.rst
new file mode 100644
index 00000000000..f2220950a3a
--- /dev/null
+++ b/doc/board/spacemit/bananapi-f3.rst
@@ -0,0 +1,106 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+Banana Pi BPI-F3
+================
+
+Building
+~~~~~~~~
+1. Install the SpacemiT riscv cross compile toolchain_, or skip it if riscv toolchain is installed.
+
+.. _toolchain: https://archive.spacemit.com/toolchain/
+
+2. Setup cross compilation environment variable:
+
+.. code-block:: console
+
+   export CROSS_COMPILE=<riscv64 toolchain prefix, e.g /opt/spacemit/bin/riscv64-unknown-linux-gnu->
+
+3. Before building U-Boot, OpenSBI should be built first. OpenSBI can be
+built for SpacemiT K1 SoC as below:
+
+.. code-block:: console
+
+   git clone https://github.com/cyyself/opensbi -b k1-opensbi
+   cd opensbi
+   make PLATFORM=generic
+
+4. Then build U-Boot as following:
+
+.. code-block:: console
+
+   cd <U-Boot-dir>
+   make bananapi-f3_defconfig
+   make OPENSBI=<OpenSBI-dir>/build/platform/generic/firmware/fw_dynamic.bin
+
+This will generate u-boot.itb
+
+Burning
+~~~~~~~
+Actually, we can replace the uboot partition of Bianbu Linux which is the bsp_ to validate this patch,
+use `balena etcher` to burn the bianbu-minimal.img to the sd card,
+and replace the /dev/sdx4 where places the uboot_ with the `u-boot.itb` generated from this patch.
+Or use fastboot:
+Collect FSBL.bin, u-boot.itb, partition_2M.json, bootinfo_spinor.bin
+u-boot-env-default.bin, fw_dynamic.itb from vendor SDK
+
+.. code-block:: console
+
+   fastboot stage FSBL.bin
+   fastboot continue
+   fastboot stage u-boot.itb-vendor # the itb from vendor uboot
+   fastboot continue
+
+   fastboot flash mtd partition_2M.json
+   fastboot flash bootinfo bootinfo_spinor.bin
+   fastboot flash fsbl FSBL.bin
+   fastboot flash env u-boot-env-default.bin
+   fastboot flash opensbi fw_dynamic.itb
+
+   fastboot flash uboot u-boot.itb-mainline # the itb from mainline uboot
+
+.. _bsp: https://archive.spacemit.com/image/k1/version/bianbu/v2.0/
+.. _uboot: https://bianbu-linux.spacemit.com/en/device/boot#21-firmware-layout
+
+Booting
+~~~~~~~
+Sample boot log from Banana Pi BPI-F3 board
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.. code-block:: none
+
+   try sd...
+   bm:3
+   j...
+
+   U-Boot SPL 2022.10spacemit-dirty (Oct 21 2024 - 09:01:13 +0000)
+   [   0.279] DDR type LPDDR4X
+   [   0.292] lpddr4_silicon_init consume 13ms
+   [   0.293] Change DDR data rate to 2400MT/s
+   [   0.430] ## Checking hash(es) for config conf-1 ... OK
+   [   0.432] ## Checking hash(es) for Image opensbi ... OK
+   [   0.437] ## Checking hash(es) for Image uboot ... OK
+   [   0.443] ## Checking hash(es) for Image fdt-1 ... OK
+   [   0.488] ## Checking hash(es) for config config_1 ... OK
+   [   0.490] ## Checking hash(es) for Image opensbi ... crc32+ OK
+
+
+   U-Boot 2024.10-rc4-00462-g5b138cfcc587-dirty (Nov 28 2024 - 14:56:49 +0800)
+
+   DRAM:  4 GiB
+   Core:  19 devices, 8 uclasses, devicetree: separate
+   Loading Environment from nowhere... OK
+   In:    serial@d4017000
+   Out:   serial@d4017000
+   Err:   serial@d4017000
+   Net:   No ethernet found.
+   => cpu list
+   0: cpu@0      spacemit,x60
+   1: cpu@1      spacemit,x60
+   2: cpu@2      spacemit,x60
+   3: cpu@3      spacemit,x60
+   4: cpu@4      spacemit,x60
+   5: cpu@5      spacemit,x60
+   6: cpu@6      spacemit,x60
+   7: cpu@7      spacemit,x60
+   => test
+   =>
+
diff --git a/doc/board/spacemit/index.rst b/doc/board/spacemit/index.rst
new file mode 100644
index 00000000000..e7d3d94e459
--- /dev/null
+++ b/doc/board/spacemit/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+SpacemiT
+========
+.. toctree::
+   :maxdepth: 1
+
+   bananapi-f3
+