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authorTom Rini <[email protected]>2024-08-22 08:15:04 -0600
committerTom Rini <[email protected]>2024-08-22 08:15:04 -0600
commite93d343cc7d2886b1148d885aa137d46bbce0570 (patch)
treeec11db6024758b99d88c8c604a7c201c54ee455f /doc
parentd2067c3ea54199ac7c09232cd5551901c75af511 (diff)
parent25a972368cf926b4d70c22a2de65d959774d5cc5 (diff)
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-samsung into next
Diffstat (limited to 'doc')
-rw-r--r--doc/board/samsung/e850-96.rst5
-rw-r--r--doc/device-tree-bindings/exynos/dwmmc.txt46
2 files changed, 30 insertions, 21 deletions
diff --git a/doc/board/samsung/e850-96.rst b/doc/board/samsung/e850-96.rst
index 0cb95473e53..0a7b6fc0c9d 100644
--- a/doc/board/samsung/e850-96.rst
+++ b/doc/board/samsung/e850-96.rst
@@ -47,12 +47,13 @@ Build Procedure
---------------
.. warning::
- At the moment both eMMC and USB features are not enabled in U-Boot. Flashing
+ At the moment USB is not enabled in U-Boot for this board. Although eMMC is
+ enabled, you won't be able to flash images over USB (fastboot). So flashing
U-Boot binary **WILL** effectively brick your board. The ``dltool`` [8]_ can
be used then to perform USB boot and flash LittleKernel bootloader binary [7]_
to unbrick and revive the board. Flashing U-Boot binary might be helpful for
developers or anybody who want to check current state of U-Boot enablement on
- E850-96 (which is mostly serial console and related blocks).
+ E850-96 (which is mostly serial console, eMMC and related blocks).
Build U-Boot binary from source code (using AArch64 baremetal GCC toolchain):
diff --git a/doc/device-tree-bindings/exynos/dwmmc.txt b/doc/device-tree-bindings/exynos/dwmmc.txt
index 694d1959162..d90792be859 100644
--- a/doc/device-tree-bindings/exynos/dwmmc.txt
+++ b/doc/device-tree-bindings/exynos/dwmmc.txt
@@ -12,7 +12,9 @@ SOC specific and Board specific properties are channel specific.
Required SoC Specific Properties:
- compatible: should be
- - samsung,exynos-dwmmc: for exynos platforms
+ - samsung,exynos4412-dw-mshc: for Exynos4 platforms
+ - samsung,exynos-dwmmc: for Exynos5 platforms
+ - samsung,exynos7-dw-mshc-smu: for Exynos7 platforms (with SMU block)
- reg: physical base address of the controller and length of memory mapped
region.
@@ -23,32 +25,38 @@ Required Board Specific Properties:
- #address-cells: should be 1.
- #size-cells: should be 0.
-- samsung,bus-width: The width of the bus used to interface the devices
+- bus-width: The width of the bus used to interface the devices
supported by DWC_mobile_storage (SD-MMC/EMMC/SDIO).
. Typically the bus width is 4 or 8.
-- samsung,timing: The timing values to be written into the
- Drv/sample clock selection register of corresponding channel.
- . It is comprised of 3 values corresponding to the 3 fileds
- 'SelClk_sample', 'SelClk_drv' and 'DIVRATIO' of CLKSEL register.
- . SelClk_sample: Select sample clock among 8 shifted clocks.
- . SelClk_drv: Select drv clock among 8 shifted clocks.
- . DIVRATIO: Clock Divide ratio select.
- . The above 3 values are used by the clock phase shifter.
+- samsung,dw-mshc-ciu-div: The divider value for the card interface unit (ciu)
+ clock (0..7).
+- samsung,dw-mshc-sdr-timing: The timing values for single data rate (SDR) mode
+ operation.
+ . First value is CIU clock phase shift value for TX mode (0..7).
+ . Second value is CIU clock phase shift value for RX mode (0..7).
+- samsung,dw-mshc-ddr-timing: The timing values for double data rate (DDR) mode
+ operation. If missing, values from samsung,dw-mshc-sdr-timing are used.
+ . First value is CIU clock phase shift value for TX mode (0..7).
+ . Second value is CIU clock phase shift value for RX mode (0..7).
Example:
mmc@12200000 {
- samsung,bus-width = <8>;
- samsung,timing = <1 3 3>;
- samsung,removable = <1>;
-}
+ bus-width = <8>;
+ non-removable;
+ samsung,dw-mshc-ciu-div = <3>;
+ samsung,dw-mshc-sdr-timing = <1 3>;
+ samsung,dw-mshc-ddr-timing = <0 2>;
+};
+
In the above example,
. The bus width is 8
- . Timing is comprised of 3 values as explained below
+ . Divider value for CLKSEL register is 3. The CIU clock rate will be
+ calculated as SDCLKIN / (3 + 1).
+ . SDR and DDR timings are comprised of 2 values as explained below
1 - SelClk_sample
3 - SelClk_drv
- 3 - DIVRATIO
- . The 'removable' flag indicates whether the the particilar device
+ . The 'non-removable' flag indicates whether the particular device
cannot be removed (always present) or it is a removable device.
- 1 - Indicates that the device is removable.
- 0 - Indicates that the device cannot be removed.
+ Flag is present - Indicates that the device cannot be removed.
+ Flag is not present - Indicates that the device is removable.