k210: use the board vendor name rather than the marketing name

"kendryte" is the marketing name for the K210 RISC-V SoC produced by
Canaan Inc. Rather than "kendryte,k210", use the usual "canaan,k210"
vendor,SoC compatibility string format in the device tree files and
use the SoC name for file names.
With these changes, the device tree files are more in sync with the
Linux kernel DTS and drivers, making uboot device tree usable by the
kernel.

Signed-off-by: Damien Le Moal <[email protected]>
Signed-off-by: Niklas Cassel <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>

4 files changed, 22 insertions, 22 deletions

diff --git a/doc/board/sipeed/maix.rst b/doc/board/sipeed/maix.rst
index ef79297ef00..903f8831d70 100644
--- a/doc/board/sipeed/maix.rst
+++ b/doc/board/sipeed/maix.rst
@@ -4,16 +4,16 @@
 MAIX
 ====
 
-Several of the Sipeed Maix series of boards cotain the Kendryte K210 processor,
-a 64-bit RISC-V CPU. This processor contains several peripherals to accelerate
-neural network processing and other "ai" tasks. This includes a "KPU" neural
-network processor, an audio processor supporting beamforming reception, and a
-digital video port supporting capture and output at VGA resolution. Other
-peripherals include 8M of SRAM (accessible with and without caching); remappable
-pins, including 40 GPIOs; AES, FFT, and SHA256 accelerators; a DMA controller;
-and I2C, I2S, and SPI controllers. Maix peripherals vary, but include spi flash;
-on-board usb-serial bridges; ports for cameras, displays, and sd cards; and
-ESP32 chips.
+Several of the Sipeed Maix series of boards contain the Kendryte K210 processor,
+a 64-bit RISC-V CPU produced by Canaan Inc. This processor contains several
+peripherals to accelerate neural network processing and other "ai" tasks. This
+includes a "KPU" neural network processor, an audio processor supporting
+beamforming reception, and a digital video port supporting capture and output at
+VGA resolution. Other peripherals include 8M of SRAM (accessible with and
+without caching); remappable pins, including 40 GPIOs; AES, FFT, and SHA256
+accelerators; a DMA controller; and I2C, I2S, and SPI controllers. Maix
+peripherals vary, but include spi flash; on-board usb-serial bridges; ports for
+cameras, displays, and sd cards; and ESP32 chips.
 
 Currently, only the Sipeed MAIX BiT V2.0 (bitm) and Sipeed MAIXDUINO are
 supported, but the boards are fairly similar.
diff --git a/doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt b/doc/device-tree-bindings/mfd/canaan,k210-sysctl.txt
index 5b24abcb62c..e48b164fc09 100644
--- a/doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt
+++ b/doc/device-tree-bindings/mfd/canaan,k210-sysctl.txt
@@ -6,7 +6,7 @@ be reference by other bindings which need a phandle to the K210 sysctl regmap.
 
 Required properties:
 - compatible: should be
-	"kendryte,k210-sysctl", "syscon", "simple-mfd"
+	"canaan,k210-sysctl", "syscon", "simple-mfd"
 - reg: address and length of the sysctl registers
 - reg-io-width: must be <4>
 
@@ -15,18 +15,18 @@ Clock sub-node
 This node is a binding for the clock tree driver
 
 Required properties:
-- compatible: should be "kendryte,k210-clk"
+- compatible: should be "canaan,k210-clk"
 - clocks: phandle to the "in0" external oscillator
 - #clock-cells: must be <1>
 
 Example:
 sysctl: syscon@50440000 {
-	compatible = "kendryte,k210-sysctl", "syscon", "simple-mfd";
+	compatible = "canaan,k210-sysctl", "syscon", "simple-mfd";
 	reg = <0x50440000 0x100>;
 	reg-io-width = <4>;
 
 	sysclk: clock-controller {
-		compatible = "kendryte,k210-clk";
+		compatible = "canaan,k210-clk";
 		clocks = <&in0>;
 		#clock-cells = <1>;
 	};
diff --git a/doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt b/doc/device-tree-bindings/pinctrl/canaan,k210-fpioa.txt
index 73871f59305..deca0cfab76 100644
--- a/doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt
+++ b/doc/device-tree-bindings/pinctrl/canaan,k210-fpioa.txt
@@ -5,10 +5,10 @@ in Kendryte K210 SoCs. Any of the 256 functions can be mapped to any of the 48
 pins.
 
 Required properties:
-- compatible: should be "kendryte,k210-fpioa"
+- compatible: should be "canaan,k210-fpioa"
 - reg: address and length of the FPIOA registers
-- kendryte,sysctl: phandle to the "sysctl" register map node
-- kendryte,power-offset: offset in the register map of the power bank control
+- canaan,sysctl: phandle to the "sysctl" register map node
+- canaan,k210-power-offset: offset in the register map of the power bank control
   register (in bytes)
 
 Configuration nodes
@@ -54,10 +54,10 @@ Notes on specific properties include:
 
 Example:
 fpioa: pinmux@502B0000 {
-	compatible = "kendryte,k210-fpioa";
+	compatible = "canaan,k210-fpioa";
 	reg = <0x502B0000 0x100>;
-	kendryte,sysctl = <&sysctl>;
-	kendryte,power-offset = <K210_SYSCTL_POWER_SEL>;
+	canaan,k210-sysctl = <&sysctl>;
+	canaan,k210-power-offset = <K210_SYSCTL_POWER_SEL>;
 
 	/* JTAG running at 3.3V and driven at 11 mA */
 	fpioa_jtag: jtag {
diff --git a/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt b/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt
index 8d2888fbe30..7a0f11c53bf 100644
--- a/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt
+++ b/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt
@@ -5,8 +5,8 @@ Required properties:
 - compatible : One of
   "altr,socfpga-spi",
   "altr,socfpga-arria10-spi",
-  "canaan,kendryte-k210-spi",
-  "canaan,kendryte-k210-ssi",
+  "canaan,k210-spi",
+  "canaan,k210-ssi",
   "intel,stratix10-spi",
   "intel,agilex-spi",
   "mscc,ocelot-spi",