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authorNick Hu <[email protected]>2026-01-19 13:55:23 +0800
committerLeo Yu-Chi Liang <[email protected]>2026-03-13 02:57:15 +0800
commit61e2430360a592040357ab6a7241c29666b11e28 (patch)
treef7e49c50c37371f6f2166c157b6fff0a293725e5 /drivers/cache
parent4dcff3b572a1d67c35b7ed71253a6d85aefe4e9b (diff)
driver: cache: Remove SiFive PL2 driver
Under single core boot platform, the secondary cores won't enter the u-boot spl. Therefore we move the pl2 driver from u-boot to the Opensbi. Signed-off-by: Nick Hu <[email protected]> Signed-off-by: Jimmy Ho <[email protected]> Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Diffstat (limited to 'drivers/cache')
-rw-r--r--drivers/cache/Kconfig6
-rw-r--r--drivers/cache/Makefile1
2 files changed, 0 insertions, 7 deletions
diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig
index f5bcd406a50..3bf5c7f5dbf 100644
--- a/drivers/cache/Kconfig
+++ b/drivers/cache/Kconfig
@@ -46,11 +46,5 @@ config SIFIVE_CCACHE
This driver is for SiFive Composable L2/L3 cache. It enables cache
ways of composable cache.
-config SIFIVE_PL2
- bool "SiFive private L2 cache"
- select CACHE
- help
- This driver is for SiFive Private L2 cache. It configures registers
- to enable the clock gating feature.
endmenu
diff --git a/drivers/cache/Makefile b/drivers/cache/Makefile
index 2f683866b87..05ad7d8a33e 100644
--- a/drivers/cache/Makefile
+++ b/drivers/cache/Makefile
@@ -5,4 +5,3 @@ obj-$(CONFIG_L2X0_CACHE) += cache-l2x0.o
obj-$(CONFIG_NCORE_CACHE) += cache-ncore.o
obj-$(CONFIG_ANDES_L2_CACHE) += cache-andes-l2.o
obj-$(CONFIG_SIFIVE_CCACHE) += cache-sifive-ccache.o
-obj-$(CONFIG_SIFIVE_PL2) += cache-sifive-pl2.o