diff options
| author | Andre Przywara <[email protected]> | 2022-09-06 12:12:50 +0100 |
|---|---|---|
| committer | Andre Przywara <[email protected]> | 2023-10-22 23:40:57 +0100 |
| commit | 452369cd0c636123321d021298b4bc35a34f4941 (patch) | |
| tree | 01f0f7a988e220f3e025a3811144a2c00f468cde /drivers/gpio/Kconfig | |
| parent | 1da48c99de18490a69c467df6c4a71701ac47fb1 (diff) | |
pinctrl: sunxi: add new D1 pinctrl support
For the first time since at least the Allwinner A10 SoCs, the D1 (and
related cores) use a new pincontroller MMIO register layout, so we
cannot use our hardcoded, fixed offsets anymore.
Ideally this would all be handled by devicetree and DM drivers, but for
the DT-less SPL we still need the legacy interfaces.
Add a new Kconfig symbol to differenciate between the two generations of
pincontrollers, and just use that to just switch some basic symbols.
The rest is already abstracted enough, so works out of the box.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Sam Edwards <[email protected]>
Tested-by: Sam Edwards <[email protected]>
Tested-by: Samuel Holland <[email protected]>
Diffstat (limited to 'drivers/gpio/Kconfig')
| -rw-r--r-- | drivers/gpio/Kconfig | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 74baa98d3c1..ba42b0768e1 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -372,6 +372,13 @@ config SUNXI_GPIO help Support the GPIO device in Allwinner SoCs. +config SUNXI_NEW_PINCTRL + bool + depends on SUNXI_GPIO + ---help--- + The Allwinner D1 and other new SoCs use a different register map + for the GPIO block, which we need to know about in the SPL. + config XILINX_GPIO bool "Xilinx GPIO driver" depends on DM_GPIO |