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authorJohan Jonker <[email protected]>2026-06-10 16:41:21 +0200
committerTom Rini <[email protected]>2026-06-25 15:00:58 -0600
commit145d58e2c7276f68195a7fc760457a5b88f867dd (patch)
tree5e1b143a9c15b2efdf9ff8828b60ed6b1f84ec67 /drivers/memory
parent173ffc7bcfbf6af70cd3b46a30110dad18278f72 (diff)
Kconfig: drivers: restyle remaining
Restyle all Kconfigs for the rest of "drivers": Menu entries : no space left Menu attributes: 1 TAB Help text : 1 TAB + 2 spaces Replace '---help---' by 'help' Signed-off-by: Johan Jonker <[email protected]> [trini: Add missing indentation on a few more multi-paragraph help texts] Signed-off-by: Tom Rini <[email protected]>
Diffstat (limited to 'drivers/memory')
-rw-r--r--drivers/memory/Kconfig16
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
index 591d9d9c656..82d0fa80396 100644
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -44,15 +44,15 @@ config STM32_OMM
This driver manages the muxing between the 2 OSPI busses and
the 2 output ports. There are 4 possible muxing configurations:
- direct mode (no multiplexing): OSPI1 output is on port 1 and OSPI2
- output is on port 2
+ output is on port 2
- OSPI1 and OSPI2 are multiplexed over the same output port 1
- swapped mode (no multiplexing), OSPI1 output is on port 2,
- OSPI2 output is on port 1
+ OSPI2 output is on port 1
- OSPI1 and OSPI2 are multiplexed over the same output port 2
It also manages :
- - the split of the memory area shared between the 2 OSPI instances.
- - chip select selection override.
- - the time between 2 transactions in multiplexed mode.
+ - the split of the memory area shared between the 2 OSPI instances.
+ - chip select selection override.
+ - the time between 2 transactions in multiplexed mode.
config TI_AEMIF
tristate "Texas Instruments AEMIF driver"
@@ -71,9 +71,9 @@ config TI_GPMC
depends on MEMORY && CLK && OF_CONTROL
help
This driver is for the General Purpose Memory Controller (GPMC)
- present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
- interfacing to a variety of asynchronous as well as synchronous
- memory drives like NOR, NAND, OneNAND, SRAM.
+ present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
+ interfacing to a variety of asynchronous as well as synchronous
+ memory drives like NOR, NAND, OneNAND, SRAM.
if TI_GPMC
config TI_GPMC_DEBUG