Merge branch 'next'

Bring in the assorted changes that have been staged in the 'next' branch
prior to release.

Signed-off-by: Tom Rini <[email protected]>

11 files changed, 128 insertions, 110 deletions

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 06b2ff972ca..df4cbd52cf5 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -233,7 +233,7 @@ endif
 config NAND_ARASAN
 	bool "Configure Arasan Nand"
 	select SYS_NAND_SELF_INIT
-	select DM_MTD
+	depends on DM_MTD
 	imply CMD_NAND
 	help
 	  This enables Nand driver support for Arasan nand flash
diff --git a/drivers/mtd/nand/raw/arasan_nfc.c b/drivers/mtd/nand/raw/arasan_nfc.c
index 6c1d64054c6..0615e503780 100644
--- a/drivers/mtd/nand/raw/arasan_nfc.c
+++ b/drivers/mtd/nand/raw/arasan_nfc.c
@@ -1306,7 +1306,7 @@ static const struct udevice_id arasan_nand_dt_ids[] = {
 };
 
 U_BOOT_DRIVER(arasan_nand) = {
-	.name = "arasan-nand",
+	.name = "arasan_nand",
 	.id = UCLASS_MTD,
 	.of_match = arasan_nand_dt_ids,
 	.probe = arasan_probe,
diff --git a/drivers/mtd/nand/raw/atmel_nand.c b/drivers/mtd/nand/raw/atmel_nand.c
index 5e95901e275..abc432c8626 100644
--- a/drivers/mtd/nand/raw/atmel_nand.c
+++ b/drivers/mtd/nand/raw/atmel_nand.c
@@ -424,7 +424,8 @@ static int pmecc_err_location(struct mtd_info *mtd)
 	}
 
 	if (!timeout) {
-		dev_err(host->dev, "atmel_nand : Timeout to calculate PMECC error location\n");
+		dev_err(mtd->dev,
+			"Timeout to calculate PMECC error location\n");
 		return -1;
 	}
 
@@ -464,7 +465,8 @@ static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc,
 			*(buf + byte_pos) ^= (1 << bit_pos);
 
 			pos = sector_num * host->pmecc_sector_size + byte_pos;
-			dev_dbg(host->dev, "Bit flip in data area, byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n",
+			dev_dbg(mtd->dev,
+				"Bit flip in data area, byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n",
 				pos, bit_pos, err_byte, *(buf + byte_pos));
 		} else {
 			/* Bit flip in OOB area */
@@ -474,7 +476,8 @@ static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc,
 			ecc[tmp] ^= (1 << bit_pos);
 
 			pos = tmp + nand_chip->ecc.layout->eccpos[0];
-			dev_dbg(host->dev, "Bit flip in OOB, oob_byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n",
+			dev_dbg(mtd->dev,
+				"Bit flip in OOB, oob_byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n",
 				pos, bit_pos, err_byte, ecc[tmp]);
 		}
 
@@ -516,7 +519,7 @@ normal_check:
 
 			err_nbr = pmecc_err_location(mtd);
 			if (err_nbr == -1) {
-				dev_err(host->dev, "PMECC: Too many errors\n");
+				dev_err(mtd->dev, "PMECC: Too many errors\n");
 				mtd->ecc_stats.failed++;
 				return -EBADMSG;
 			} else {
@@ -560,7 +563,7 @@ static int atmel_nand_pmecc_read_page(struct mtd_info *mtd,
 	}
 
 	if (!timeout) {
-		dev_err(host->dev, "atmel_nand : Timeout to read PMECC page\n");
+		dev_err(mtd->dev, "Timeout to read PMECC page\n");
 		return -1;
 	}
 
@@ -600,7 +603,8 @@ static int atmel_nand_pmecc_write_page(struct mtd_info *mtd,
 	}
 
 	if (!timeout) {
-		dev_err(host->dev, "atmel_nand : Timeout to read PMECC status, fail to write PMECC in oob\n");
+		dev_err(mtd->dev,
+			"Timeout to read PMECC status, fail to write PMECC in oob\n");
 		goto out;
 	}
 
@@ -713,7 +717,8 @@ static int pmecc_choose_ecc(struct atmel_nand_host *host,
 
 	if (*cap == 0 && *sector_size == 0) {
 		/* Non-ONFI compliant */
-		dev_info(host->dev, "NAND chip is not ONFI compliant, assume ecc_bits is 2 in 512 bytes\n");
+		dev_info(chip->mtd.dev,
+			 "NAND chip is not ONFI compliant, assume ecc_bits is 2 in 512 bytes\n");
 		*cap = 2;
 		*sector_size = 512;
 	}
@@ -835,17 +840,20 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand,
 	 * from ONFI.
 	 */
 	if (pmecc_choose_ecc(host, nand, &cap, &sector_size)) {
-		dev_err(host->dev, "Required ECC %d bits in %d bytes not supported!\n",
+		dev_err(mtd->dev,
+			"Required ECC %d bits in %d bytes not supported!\n",
 			cap, sector_size);
 		return -EINVAL;
 	}
 
 	if (cap > host->pmecc_corr_cap)
-		dev_info(host->dev, "WARNING: Using different ecc correct bits(%d bit) from Nand ONFI ECC reqirement (%d bit).\n",
-				host->pmecc_corr_cap, cap);
+		dev_info(mtd->dev,
+			 "WARNING: Using different ecc correct bits(%d bit) from Nand ONFI ECC reqirement (%d bit).\n",
+			 host->pmecc_corr_cap, cap);
 	if (sector_size < host->pmecc_sector_size)
-		dev_info(host->dev, "WARNING: Using different ecc correct sector size (%d bytes) from Nand ONFI ECC reqirement (%d bytes).\n",
-				host->pmecc_sector_size, sector_size);
+		dev_info(mtd->dev,
+			 "WARNING: Using different ecc correct sector size (%d bytes) from Nand ONFI ECC reqirement (%d bytes).\n",
+			 host->pmecc_sector_size, sector_size);
 #else	/* CONFIG_SYS_NAND_ONFI_DETECTION */
 	host->pmecc_corr_cap = CONFIG_PMECC_CAP;
 	host->pmecc_sector_size = CONFIG_PMECC_SECTOR_SIZE;
@@ -877,7 +885,7 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand,
 #if defined(NO_GALOIS_TABLE_IN_ROM)
 	pmecc_galois_table = create_lookup_table(host->pmecc_sector_size);
 	if (!pmecc_galois_table) {
-		dev_err(host->dev, "out of memory\n");
+		dev_err(mtd->dev, "out of memory\n");
 		return -ENOMEM;
 	}
 
@@ -909,13 +917,14 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand,
 				       host->pmecc_sector_number;
 
 		if (nand->ecc.bytes > MTD_MAX_ECCPOS_ENTRIES_LARGE) {
-			dev_err(host->dev, "too large eccpos entries. max support ecc.bytes is %d\n",
-					MTD_MAX_ECCPOS_ENTRIES_LARGE);
+			dev_err(mtd->dev,
+				"too large eccpos entries. max support ecc.bytes is %d\n",
+				MTD_MAX_ECCPOS_ENTRIES_LARGE);
 			return -EINVAL;
 		}
 
 		if (nand->ecc.bytes > mtd->oobsize - PMECC_OOB_RESERVED_BYTES) {
-			dev_err(host->dev, "No room for ECC bytes\n");
+			dev_err(mtd->dev, "No room for ECC bytes\n");
 			return -EINVAL;
 		}
 		pmecc_config_ecc_layout(&atmel_pmecc_oobinfo,
@@ -926,7 +935,8 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand,
 	case 512:
 	case 1024:
 		/* TODO */
-		dev_err(host->dev, "Unsupported page size for PMECC, use Software ECC\n");
+		dev_err(mtd->dev,
+			"Unsupported page size for PMECC, use Software ECC\n");
 	default:
 		/* page size not handled by HW ECC */
 		/* switching back to soft ECC */
@@ -940,7 +950,8 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand,
 
 	/* Allocate data for PMECC computation */
 	if (pmecc_data_alloc(host)) {
-		dev_err(host->dev, "Cannot allocate memory for PMECC computation!\n");
+		dev_err(mtd->dev,
+			"Cannot allocate memory for PMECC computation!\n");
 		return -ENOMEM;
 	}
 
@@ -951,7 +962,7 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand,
 
 	/* Check the PMECC ip version */
 	host->pmecc_version = pmecc_readl(host->pmerrloc, version);
-	dev_dbg(host->dev, "PMECC IP version is: %x\n", host->pmecc_version);
+	dev_dbg(mtd->dev, "PMECC IP version is: %x\n", host->pmecc_version);
 
 	atmel_pmecc_core_init(mtd);
 
@@ -1114,8 +1125,8 @@ static int atmel_nand_correct(struct mtd_info *mtd, u_char *dat,
 		/* it doesn't seems to be a freshly
 		 * erased block.
 		 * We can't correct so many errors */
-		dev_warn(host->dev, "atmel_nand : multiple errors detected."
-				" Unable to correct.\n");
+		dev_warn(mtd->dev,
+			 "multiple errors detected. Unable to correct.\n");
 		return -EBADMSG;
 	}
 
@@ -1124,15 +1135,14 @@ static int atmel_nand_correct(struct mtd_info *mtd, u_char *dat,
 		/* there's nothing much to do here.
 		 * the bit error is on the ECC itself.
 		 */
-		dev_warn(host->dev, "atmel_nand : one bit error on ECC code."
-				" Nothing to correct\n");
+		dev_warn(mtd->dev,
+			 "one bit error on ECC code. Nothing to correct\n");
 		return 0;
 	}
 
-	dev_warn(host->dev, "atmel_nand : one bit error on data."
-			" (word offset in the page :"
-			" 0x%x bit offset : 0x%x)\n",
-			ecc_word, ecc_bit);
+	dev_warn(mtd->dev,
+		 "one bit error on data. (word offset in the page : 0x%x bit offset : 0x%x)\n",
+		 ecc_word, ecc_bit);
 	/* correct the error */
 	if (nand_chip->options & NAND_BUSWIDTH_16) {
 		/* 16 bits words */
@@ -1141,7 +1151,7 @@ static int atmel_nand_correct(struct mtd_info *mtd, u_char *dat,
 		/* 8 bits words */
 		dat[ecc_word] ^= (1 << ecc_bit);
 	}
-	dev_warn(host->dev, "atmel_nand : error corrected\n");
+	dev_warn(mtd->dev, "error corrected\n");
 	return 1;
 }
 
@@ -1511,7 +1521,6 @@ void board_nand_init(void)
 	int i;
 	for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
 		if (atmel_nand_chip_init(i, base_addr[i]))
-			dev_err(host->dev, "atmel_nand: Fail to initialize #%d chip",
-				i);
+			log_err("atmel_nand: Fail to initialize #%d chip", i);
 }
 #endif /* CONFIG_SPL_BUILD */
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 48c0ca69de5..7349a9bc99e 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -956,7 +956,7 @@ static struct nand_ecclayout *brcmnand_create_layout(int ecc_level,
 	 */
 	req = DIV_ROUND_UP(ecc_level * 14, 8);
 	if (req >= sas) {
-		dev_err(&host->pdev->dev,
+		dev_err(host->pdev,
 			"error: ECC too large for OOB (ECC bytes %d, spare sector %d)\n",
 			req, sas);
 		return NULL;
@@ -1012,8 +1012,8 @@ static struct nand_ecclayout *brcmstb_choose_ecc_layout(
 
 	layout = brcmnand_create_layout(ecc_level, host);
 	if (!layout) {
-		dev_err(&host->pdev->dev,
-				"no proper ecc_layout for this NAND cfg\n");
+		dev_err(host->pdev,
+			"no proper ecc_layout for this NAND cfg\n");
 		return NULL;
 	}
 
@@ -1056,17 +1056,9 @@ static void brcmnand_wp(struct mtd_info *mtd, int wp)
 					       NAND_CTRL_RDY |
 					       NAND_STATUS_READY |
 					       (wp ? 0 : NAND_STATUS_WP), 0);
-#ifndef __UBOOT__
-		if (ret)
-			dev_err_ratelimited(&host->pdev->dev,
-					    "nand #WP expected %s\n",
-					    wp ? "on" : "off");
-#else
 		if (ret)
-			dev_err(&host->pdev->dev,
-					    "nand #WP expected %s\n",
-					    wp ? "on" : "off");
-#endif /* __UBOOT__ */
+			dev_err(host->pdev, "nand #WP expected %s\n",
+				wp ? "on" : "off");
 	}
 }
 
@@ -2257,7 +2249,7 @@ static int brcmnand_init_cs(struct brcmnand_host *host, ofnode dn)
 	ret = ofnode_read_s32(dn, "reg", &host->cs);
 #endif
 	if (ret) {
-		dev_err(&pdev->dev, "can't get chip-select\n");
+		dev_err(pdev, "can't get chip-select\n");
 		return -ENXIO;
 	}
 
diff --git a/drivers/mtd/nand/raw/pxa3xx_nand.c b/drivers/mtd/nand/raw/pxa3xx_nand.c
index a30e82166b9..5fb3081c839 100644
--- a/drivers/mtd/nand/raw/pxa3xx_nand.c
+++ b/drivers/mtd/nand/raw/pxa3xx_nand.c
@@ -512,7 +512,7 @@ static int pxa3xx_nand_init_timings(struct pxa3xx_nand_host *host)
 		}
 
 		if (i == ntypes) {
-			dev_err(&info->pdev->dev, "Error: timings not found\n");
+			dev_err(mtd->dev, "Error: timings not found\n");
 			return -EINVAL;
 		}
 
@@ -603,7 +603,7 @@ static void drain_fifo(struct pxa3xx_nand_info *info, void *data, int len)
 			ts = get_timer(0);
 			while (!(nand_readl(info, NDSR) & NDSR_RDDREQ)) {
 				if (get_timer(ts) > TIMEOUT_DRAIN_FIFO) {
-					dev_err(&info->pdev->dev,
+					dev_err(info->controller.active->mtd.dev,
 						"Timeout on RDDREQ while draining the FIFO\n");
 					return;
 				}
@@ -656,8 +656,8 @@ static void handle_data_pio(struct pxa3xx_nand_info *info)
 				   DIV_ROUND_UP(info->step_spare_size, 4));
 		break;
 	default:
-		dev_err(&info->pdev->dev, "%s: invalid state %d\n", __func__,
-				info->state);
+		dev_err(info->controller.active->mtd.dev,
+			"%s: invalid state %d\n", __func__, info->state);
 		BUG();
 	}
 
@@ -1027,7 +1027,7 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
 
 	default:
 		exec_cmd = 0;
-		dev_err(&info->pdev->dev, "non-supported command %x\n",
+		dev_err(mtd->dev, "non-supported command %x\n",
 			command);
 		break;
 	}
@@ -1087,7 +1087,7 @@ static void nand_cmdfunc(struct mtd_info *mtd, unsigned command,
 				break;
 
 			if (get_timer(ts) > CHIP_DELAY_TIMEOUT) {
-				dev_err(&info->pdev->dev, "Wait timeout!!!\n");
+				dev_err(mtd->dev, "Wait timeout!!!\n");
 				return;
 			}
 		}
@@ -1180,7 +1180,7 @@ static void nand_cmdfunc_extended(struct mtd_info *mtd,
 				break;
 
 			if (get_timer(ts) > CHIP_DELAY_TIMEOUT) {
-				dev_err(&info->pdev->dev, "Wait timeout!!!\n");
+				dev_err(mtd->dev, "Wait timeout!!!\n");
 				return;
 			}
 		}
@@ -1426,7 +1426,7 @@ static int pxa3xx_nand_waitfunc(struct mtd_info *mtd, struct nand_chip *this)
 				break;
 
 			if (get_timer(ts) > CHIP_DELAY_TIMEOUT) {
-				dev_err(&info->pdev->dev, "Ready timeout!!!\n");
+				dev_err(mtd->dev, "Ready timeout!!!\n");
 				return NAND_STATUS_FAIL;
 			}
 		}
@@ -1633,7 +1633,7 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
 		ecc->strength = 16;
 
 	} else {
-		dev_err(&info->pdev->dev,
+		dev_err(info->controller.active->mtd.dev,
 			"ECC strength %d at page size %d is not supported\n",
 			strength, page_size);
 		return -ENODEV;
@@ -1659,8 +1659,7 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
 			return ret;
 		ret = pxa3xx_nand_sensing(host);
 		if (ret) {
-			dev_info(&info->pdev->dev,
-				 "There is no chip on cs %d!\n",
+			dev_info(mtd->dev, "There is no chip on cs %d!\n",
 				 info->cs);
 			return ret;
 		}
@@ -1676,7 +1675,7 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
 	if (!pdata->keep_config) {
 		ret = pxa3xx_nand_init_timings(host);
 		if (ret) {
-			dev_err(&info->pdev->dev,
+			dev_err(mtd->dev,
 				"Failed to set timings: %d\n", ret);
 			return ret;
 		}
@@ -1720,7 +1719,7 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
 		if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370) {
 			chip->cmdfunc = nand_cmdfunc_extended;
 		} else {
-			dev_err(&info->pdev->dev,
+			dev_err(mtd->dev,
 				"unsupported page size on this variant\n");
 			return -ENODEV;
 		}
@@ -1873,6 +1872,7 @@ static int pxa3xx_nand_probe_dt(struct pxa3xx_nand_info *info)
 
 static int pxa3xx_nand_probe(struct pxa3xx_nand_info *info)
 {
+	struct mtd_info *mtd = &info->controller.active->mtd;
 	struct pxa3xx_nand_platform_data *pdata;
 	int ret, cs, probe_success;
 
@@ -1884,7 +1884,7 @@ static int pxa3xx_nand_probe(struct pxa3xx_nand_info *info)
 
 	ret = alloc_nand_resource(info);
 	if (ret) {
-		dev_err(&pdev->dev, "alloc nand resource failed\n");
+		dev_err(mtd->dev, "alloc nand resource failed\n");
 		return ret;
 	}
 
@@ -1901,7 +1901,7 @@ static int pxa3xx_nand_probe(struct pxa3xx_nand_info *info)
 		info->cs = cs;
 		ret = pxa3xx_nand_scan(mtd);
 		if (ret) {
-			dev_info(&pdev->dev, "failed to scan nand at cs %d\n",
+			dev_info(mtd->dev, "failed to scan nand at cs %d\n",
 				 cs);
 			continue;
 		}
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index 004b6f17a51..12fc065b320 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -1226,7 +1226,8 @@ static int _sunxi_nand_lookup_timing(const s32 *lut, int lut_size, u32 duration,
 #define sunxi_nand_lookup_timing(l, p, c) \
 			_sunxi_nand_lookup_timing(l, ARRAY_SIZE(l), p, c)
 
-static int sunxi_nand_chip_set_timings(struct sunxi_nand_chip *chip,
+static int sunxi_nand_chip_set_timings(struct sunxi_nfc *nfc,
+				       struct sunxi_nand_chip *chip,
 				       const struct nand_sdr_timings *timings)
 {
 	u32 min_clk_period = 0;
@@ -1349,7 +1350,8 @@ static int sunxi_nand_chip_set_timings(struct sunxi_nand_chip *chip,
 	return 0;
 }
 
-static int sunxi_nand_chip_init_timings(struct sunxi_nand_chip *chip)
+static int sunxi_nand_chip_init_timings(struct sunxi_nfc *nfc,
+					struct sunxi_nand_chip *chip)
 {
 	struct mtd_info *mtd = nand_to_mtd(&chip->nand);
 	const struct nand_sdr_timings *timings;
@@ -1384,7 +1386,7 @@ static int sunxi_nand_chip_init_timings(struct sunxi_nand_chip *chip)
 	if (IS_ERR(timings))
 		return PTR_ERR(timings);
 
-	return sunxi_nand_chip_set_timings(chip, timings);
+	return sunxi_nand_chip_set_timings(nfc, chip, timings);
 }
 
 static int sunxi_nand_hw_common_ecc_ctrl_init(struct mtd_info *mtd,
@@ -1423,7 +1425,7 @@ static int sunxi_nand_hw_common_ecc_ctrl_init(struct mtd_info *mtd,
 	}
 
 	if (i >= ARRAY_SIZE(strengths)) {
-		dev_err(nfc->dev, "unsupported strength\n");
+		dev_err(mtd->dev, "unsupported strength\n");
 		ret = -ENOTSUPP;
 		goto err;
 	}
@@ -1619,7 +1621,7 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)
 
 	nsels /= sizeof(u32);
 	if (!nsels || nsels > 8) {
-		dev_err(dev, "invalid reg property size\n");
+		dev_err(nfc->dev, "invalid reg property size\n");
 		return -EINVAL;
 	}
 
@@ -1627,7 +1629,7 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)
 		       (nsels * sizeof(struct sunxi_nand_chip_sel)),
 		       GFP_KERNEL);
 	if (!chip) {
-		dev_err(dev, "could not allocate chip\n");
+		dev_err(nfc->dev, "could not allocate chip\n");
 		return -ENOMEM;
 	}
 
@@ -1641,14 +1643,14 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)
 
 	ret = fdtdec_get_int_array(gd->fdt_blob, node, "reg", cs, nsels);
 	if (ret) {
-		dev_err(dev, "could not retrieve reg property: %d\n", ret);
+		dev_err(nfc->dev, "could not retrieve reg property: %d\n", ret);
 		return ret;
 	}
 
 	ret = fdtdec_get_int_array(gd->fdt_blob, node, "allwinner,rb", rb,
 				   nsels);
 	if (ret) {
-		dev_err(dev, "could not retrieve reg property: %d\n", ret);
+		dev_err(nfc->dev, "could not retrieve reg property: %d\n", ret);
 		return ret;
 	}
 
@@ -1656,14 +1658,13 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)
 		int tmp = cs[i];
 
 		if (tmp > NFC_MAX_CS) {
-			dev_err(dev,
-				"invalid reg value: %u (max CS = 7)\n",
-				tmp);
+			dev_err(nfc->dev,
+				"invalid reg value: %u (max CS = 7)\n", tmp);
 			return -EINVAL;
 		}
 
 		if (test_and_set_bit(tmp, &nfc->assigned_cs)) {
-			dev_err(dev, "CS %d already assigned\n", tmp);
+			dev_err(nfc->dev, "CS %d already assigned\n", tmp);
 			return -EINVAL;
 		}
 
@@ -1688,15 +1689,15 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)
 	timings = onfi_async_timing_mode_to_sdr_timings(0);
 	if (IS_ERR(timings)) {
 		ret = PTR_ERR(timings);
-		dev_err(dev,
+		dev_err(nfc->dev,
 			"could not retrieve timings for ONFI mode 0: %d\n",
 			ret);
 		return ret;
 	}
 
-	ret = sunxi_nand_chip_set_timings(chip, timings);
+	ret = sunxi_nand_chip_set_timings(nfc, chip, timings);
 	if (ret) {
-		dev_err(dev, "could not configure chip timings: %d\n", ret);
+		dev_err(nfc->dev, "could not configure chip timings: %d\n", ret);
 		return ret;
 	}
 
@@ -1729,27 +1730,27 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)
 
 	nand->options |= NAND_SUBPAGE_READ;
 
-	ret = sunxi_nand_chip_init_timings(chip);
+	ret = sunxi_nand_chip_init_timings(nfc, chip);
 	if (ret) {
-		dev_err(dev, "could not configure chip timings: %d\n", ret);
+		dev_err(nfc->dev, "could not configure chip timings: %d\n", ret);
 		return ret;
 	}
 
 	ret = sunxi_nand_ecc_init(mtd, &nand->ecc);
 	if (ret) {
-		dev_err(dev, "ECC init failed: %d\n", ret);
+		dev_err(nfc->dev, "ECC init failed: %d\n", ret);
 		return ret;
 	}
 
 	ret = nand_scan_tail(mtd);
 	if (ret) {
-		dev_err(dev, "nand_scan_tail failed: %d\n", ret);
+		dev_err(nfc->dev, "nand_scan_tail failed: %d\n", ret);
 		return ret;
 	}
 
 	ret = nand_register(devnum, mtd);
 	if (ret) {
-		dev_err(dev, "failed to register mtd device: %d\n", ret);
+		dev_err(nfc->dev, "failed to register mtd device: %d\n", ret);
 		return ret;
 	}
 
@@ -1769,7 +1770,7 @@ static int sunxi_nand_chips_init(int node, struct sunxi_nfc *nfc)
 		i++;
 
 	if (i > 8) {
-		dev_err(dev, "too many NAND chips: %d (max = 8)\n", i);
+		dev_err(nfc->dev, "too many NAND chips: %d (max = 8)\n", i);
 		return -EINVAL;
 	}
 
@@ -1841,7 +1842,7 @@ void sunxi_nand_init(void)
 
 	ret = sunxi_nand_chips_init(node, nfc);
 	if (ret) {
-		dev_err(dev, "failed to init nand chips\n");
+		dev_err(nfc->dev, "failed to init nand chips\n");
 		goto err;
 	}
 
diff --git a/drivers/mtd/nand/raw/vf610_nfc.c b/drivers/mtd/nand/raw/vf610_nfc.c
index 52c8a94778c..4e6fdc607ff 100644
--- a/drivers/mtd/nand/raw/vf610_nfc.c
+++ b/drivers/mtd/nand/raw/vf610_nfc.c
@@ -152,6 +152,8 @@ enum vf610_nfc_alt_buf {
 
 struct vf610_nfc {
 	struct nand_chip chip;
+	/* NULL without CONFIG_NAND_VF610_NFC_DT */
+	struct udevice *dev;
 	void __iomem *regs;
 	uint buf_offset;
 	int write_sz;
@@ -631,11 +633,10 @@ struct vf610_nfc_config {
 	int flash_bbt;
 };
 
-static int vf610_nfc_nand_init(int devnum, void __iomem *addr)
+static int vf610_nfc_nand_init(struct vf610_nfc *nfc, int devnum)
 {
-	struct mtd_info *mtd;
-	struct nand_chip *chip;
-	struct vf610_nfc *nfc;
+	struct nand_chip *chip = &nfc->chip;
+	struct mtd_info *mtd = nand_to_mtd(chip);
 	int err = 0;
 	struct vf610_nfc_config cfg = {
 		.hardware_ecc = 1,
@@ -647,16 +648,6 @@ static int vf610_nfc_nand_init(int devnum, void __iomem *addr)
 		.flash_bbt = 1,
 	};
 
-	nfc = calloc(1, sizeof(*nfc));
-	if (!nfc) {
-		printf(KERN_ERR "%s: Memory exhausted!\n", __func__);
-		return -ENOMEM;
-	}
-
-	chip = &nfc->chip;
-	nfc->regs = addr;
-
-	mtd = nand_to_mtd(chip);
 	nand_set_controller_data(chip, nfc);
 
 	if (cfg.width == 16)
@@ -777,20 +768,23 @@ static const struct udevice_id vf610_nfc_dt_ids[] = {
 static int vf610_nfc_dt_probe(struct udevice *dev)
 {
 	struct resource res;
+	struct vf610_nfc *nfc = dev_get_priv(dev);
 	int ret;
 
 	ret = dev_read_resource(dev, 0, &res);
 	if (ret)
 		return ret;
 
-	return vf610_nfc_nand_init(0, devm_ioremap(dev, res.start,
-						   resource_size(&res)));
+	nfc->regs = devm_ioremap(dev, res.start, resource_size(&res));
+	nfc->dev = dev;
+	return vf610_nfc_nand_init(nfc, 0);
 }
 
 U_BOOT_DRIVER(vf610_nfc_dt) = {
 	.name = "vf610-nfc-dt",
 	.id = UCLASS_MTD,
 	.of_match = vf610_nfc_dt_ids,
+	.priv_auto_alloc_size = sizeof(struct vf610_nfc),
 	.probe = vf610_nfc_dt_probe,
 };
 
@@ -809,7 +803,17 @@ void board_nand_init(void)
 #else
 void board_nand_init(void)
 {
-	int err = vf610_nfc_nand_init(0, (void __iomem *)CONFIG_SYS_NAND_BASE);
+	int err;
+	struct vf610_nfc *nfc;
+
+	nfc = calloc(1, sizeof(*nfc));
+	if (!nfc) {
+		printf("%s: Out of memory\n", __func__);
+		return;
+	}
+
+	nfc->regs = (void __iomem *)CONFIG_SYS_NAND_BASE;
+	err = vf610_nfc_nand_init(nfc, 0);
 	if (err)
 		printf("VF610 NAND init failed (err %d)\n", err);
 }
diff --git a/drivers/mtd/nand/raw/zynq_nand.c b/drivers/mtd/nand/raw/zynq_nand.c
index fa594552109..92db2aa19c8 100644
--- a/drivers/mtd/nand/raw/zynq_nand.c
+++ b/drivers/mtd/nand/raw/zynq_nand.c
@@ -1282,7 +1282,7 @@ static const struct udevice_id zynq_nand_dt_ids[] = {
 };
 
 U_BOOT_DRIVER(zynq_nand) = {
-	.name = "zynq-nand",
+	.name = "zynq_nand",
 	.id = UCLASS_MTD,
 	.of_match = zynq_nand_dt_ids,
 	.probe = zynq_nand_probe,
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 93371fdde07..8c7e07d4630 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -984,13 +984,13 @@ static int spinand_detect(struct spinand_device *spinand)
 
 	ret = spinand_manufacturer_detect(spinand);
 	if (ret) {
-		dev_err(dev, "unknown raw ID %*phN\n", SPINAND_MAX_ID_LEN,
-			spinand->id.data);
+		dev_err(spinand->slave->dev, "unknown raw ID %*phN\n",
+			SPINAND_MAX_ID_LEN, spinand->id.data);
 		return ret;
 	}
 
 	if (nand->memorg.ntargets > 1 && !spinand->select_target) {
-		dev_err(dev,
+		dev_err(spinand->slave->dev,
 			"SPI NANDs with more than one die must implement ->select_target()\n");
 		return -EINVAL;
 	}
@@ -1076,7 +1076,7 @@ static int spinand_init(struct spinand_device *spinand)
 
 	ret = spinand_manufacturer_init(spinand);
 	if (ret) {
-		dev_err(dev,
+		dev_err(spinand->slave->dev,
 			"Failed to initialize the SPI NAND chip (err = %d)\n",
 			ret);
 		goto err_free_bufs;
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 0113e70037f..e16b0e1462d 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -11,6 +11,7 @@
 
 #include <common.h>
 #include <log.h>
+#include <dm.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
 #include <linux/bitops.h>
diff --git a/drivers/mtd/spi/spi-nor-tiny.c b/drivers/mtd/spi/spi-nor-tiny.c
index fa26ea33c8b..07c8c7b82b1 100644
--- a/drivers/mtd/spi/spi-nor-tiny.c
+++ b/drivers/mtd/spi/spi-nor-tiny.c
@@ -55,9 +55,19 @@ static int spi_nor_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
 	int ret;
 
 	ret = spi_nor_read_write_reg(nor, &op, val);
-	if (ret < 0)
-		dev_dbg(&flash->spimem->spi->dev, "error %d reading %x\n", ret,
+	if (ret < 0) {
+		/*
+		 * spi_slave does not have a struct udevice member without DM,
+		 * so use the bus and cs instead.
+		 */
+#if CONFIG_IS_ENABLED(DM_SPI)
+		dev_dbg(nor->spi->dev, "error %d reading %x\n", ret,
 			code);
+#else
+		log_debug("spi%u.%u: error %d reading %x\n",
+			  nor->spi->bus, nor->spi->cs, ret, code);
+#endif
+	}
 
 	return ret;
 }
@@ -512,7 +522,8 @@ static int spansion_read_cr_quad_enable(struct spi_nor *nor)
 	/* Check current Quad Enable bit value. */
 	ret = read_cr(nor);
 	if (ret < 0) {
-		dev_dbg(dev, "error while reading configuration register\n");
+		dev_dbg(nor->dev,
+			"error while reading configuration register\n");
 		return -EINVAL;
 	}
 
@@ -524,7 +535,7 @@ static int spansion_read_cr_quad_enable(struct spi_nor *nor)
 	/* Keep the current value of the Status Register. */
 	ret = read_sr(nor);
 	if (ret < 0) {
-		dev_dbg(dev, "error while reading status register\n");
+		dev_dbg(nor->dev, "error while reading status register\n");
 		return -EINVAL;
 	}
 	sr_cr[0] = ret;
@@ -785,7 +796,7 @@ int spi_nor_scan(struct spi_nor *nor)
 	}
 
 	if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
-		dev_dbg(dev, "address width is too large: %u\n",
+		dev_dbg(nor->dev, "address width is too large: %u\n",
 			nor->addr_width);
 		return -EINVAL;
 	}