diff options
| author | Stefan Roese <[email protected]> | 2015-07-16 10:40:05 +0200 |
|---|---|---|
| committer | Luka Perkov <[email protected]> | 2015-08-17 18:49:02 +0200 |
| commit | 2a0b7dc3b6ce4e4994ef71dcd6fbb31000c2ae47 (patch) | |
| tree | 26ae347416c6cd0980a57ee7ffadcf4322ad0ce4 /drivers/net | |
| parent | 501c098a1f2cdaa930cb1a7166d3724467890a64 (diff) | |
arm: mvebu: Enable NAND controller on MVEBU SoC's
This patch enables the NAND controller on the Armada XP/38x and provides
a new function that returns the NAND controller input clock. This
function will be used by the MVEBU NAND driver.
As part of this patch, the multiple BIT macro definitions are moved
to a common place in soc.h.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Peter Morrow <[email protected]>
Cc: Luka Perkov <[email protected]>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/mvneta.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c index efaae167fef..38ad14eff96 100644 --- a/drivers/net/mvneta.c +++ b/drivers/net/mvneta.c @@ -41,7 +41,6 @@ printf(fmt, ##args) #define CONFIG_NR_CPUS 1 -#define BIT(nr) (1UL << (nr)) #define ETH_HLEN 14 /* Total octets in header */ /* 2(HW hdr) 14(MAC hdr) 4(CRC) 32(extra for cache prefetch) */ |