diff options
| author | Tom Rini <[email protected]> | 2021-09-09 07:54:50 -0400 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2021-10-01 21:08:18 -0400 |
| commit | 8ba59608dc8607a5dac1c063502c548f7f9645bb (patch) | |
| tree | 537e38978caf65e70176cbdb38915f07d8b6be87 /drivers/net | |
| parent | d9be8606bb983db398a7444533a72e3e4eabe011 (diff) | |
arm: Remove zmx25 board and ARCH_MX25
This board has not been converted to CONFIG_DM by the deadline.
Remove it. As this is the last ARCH_MX25 platform, remove those
references as well.
Cc: Matthias Weisser <[email protected]>
Cc: Stefano Babic <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/fec_mxc.c | 2 | ||||
| -rw-r--r-- | drivers/net/fec_mxc.h | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 9bb42e5ca90..40a86a3e12f 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -521,7 +521,7 @@ static int fec_open(struct eth_device *edev) &fec->eth->ecntrl); #endif -#if defined(CONFIG_MX25) || defined(CONFIG_MX53) || defined(CONFIG_MX6SL) +#if defined(CONFIG_MX53) || defined(CONFIG_MX6SL) udelay(100); /* setup the MII gasket for RMII mode */ diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h index 62b55ef3959..1c0d0e5b8f8 100644 --- a/drivers/net/fec_mxc.h +++ b/drivers/net/fec_mxc.h @@ -128,7 +128,7 @@ struct ethernet_regs { uint32_t res14[7]; /* MBAR_ETH + 0x2E4-2FC */ -#if defined(CONFIG_MX25) || defined(CONFIG_MX53) || defined(CONFIG_MX6SL) +#if defined(CONFIG_MX53) || defined(CONFIG_MX6SL) uint16_t miigsk_cfgr; /* MBAR_ETH + 0x300 */ uint16_t res15[3]; /* MBAR_ETH + 0x302-306 */ uint16_t miigsk_enr; /* MBAR_ETH + 0x308 */ @@ -196,7 +196,7 @@ struct ethernet_regs { #define FEC_X_DES_ACTIVE_TDAR 0x01000000 #define FEC_R_DES_ACTIVE_RDAR 0x01000000 -#if defined(CONFIG_MX25) || defined(CONFIG_MX53) || defined(CONFIG_MX6SL) +#if defined(CONFIG_MX53) || defined(CONFIG_MX6SL) /* defines for MIIGSK */ /* RMII frequency control: 0=50MHz, 1=5MHz */ #define MIIGSK_CFGR_FRCONT (1 << 6) |