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authorTom Rini <[email protected]>2025-08-18 10:54:44 -0600
committerTom Rini <[email protected]>2025-08-18 10:54:44 -0600
commit54fbdd408873413af86d86de03a490c5abf280f1 (patch)
tree4f08a3a23bfd457590b733893a082b15f817698d /drivers/phy/marvell
parent6dee9a5b74972d18b0c554f31907dd0043b9e9f9 (diff)
parentc4526c390a3c4ea1c4f244b6436ebbb74902769a (diff)
Merge tag 'net-20250818' of https://source.denx.de/u-boot/custodians/u-boot-net
Pull request net-20250818. This is mostly code cleanup and fixes, mainly for issues reported by the Smatch tool, plus two small features for NET_LWIP as well as support for the BCM54612E phy. net-common: - Fix a bunch of issues reported by Smatch - Introduce CONFIG_DNS - Add support for BCM54612E phy net-legacy: - Add missing SPDX-License-Identifier for files originating from LiMon net-lwip: - ping: initialize net_try_count to 1 - sntp: remove redundant sys_check_timeouts() - tftp: resend initial request - Add Kconfig option to show ICMP unreachable errors
Diffstat (limited to 'drivers/phy/marvell')
-rw-r--r--drivers/phy/marvell/comphy_core.c4
-rw-r--r--drivers/phy/marvell/comphy_core.h4
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/phy/marvell/comphy_core.c b/drivers/phy/marvell/comphy_core.c
index a666a4e794e..a4121423873 100644
--- a/drivers/phy/marvell/comphy_core.c
+++ b/drivers/phy/marvell/comphy_core.c
@@ -28,7 +28,7 @@ static const char *get_speed_string(u32 speed)
"10.3125 Gbps"
};
- if (speed < 0 || speed > COMPHY_SPEED_MAX)
+ if (speed < 0 || speed >= COMPHY_SPEED_MAX)
return "invalid";
return speed_strings[speed];
@@ -44,7 +44,7 @@ static const char *get_type_string(u32 type)
"IGNORE"
};
- if (type < 0 || type > COMPHY_TYPE_MAX)
+ if (type < 0 || type >= COMPHY_TYPE_MAX)
return "invalid";
return type_strings[type];
diff --git a/drivers/phy/marvell/comphy_core.h b/drivers/phy/marvell/comphy_core.h
index f3d04939387..086a4d82f26 100644
--- a/drivers/phy/marvell/comphy_core.h
+++ b/drivers/phy/marvell/comphy_core.h
@@ -47,8 +47,8 @@ struct chip_serdes_phy_config {
int (*rx_training)(struct chip_serdes_phy_config *, u32);
void __iomem *comphy_base_addr;
void __iomem *hpipe3_base_addr;
- u32 comphy_lanes_count;
- u32 comphy_mux_bitcount;
+ int comphy_lanes_count;
+ int comphy_mux_bitcount;
const fdt32_t *comphy_mux_lane_order;
u32 cp_index;
struct comphy_map comphy_map_data[MAX_LANE_OPTIONS];