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authorTom Rini <[email protected]>2025-06-14 09:10:48 -0600
committerTom Rini <[email protected]>2025-06-14 09:10:48 -0600
commit03817a2a8046ea89dac2be72ce0c16a9faa5570b (patch)
treeb4d6f39f9b0ded094c7f54aeb135a9eae6e19492 /drivers/phy
parent2556caa89caba6c3d4df7910828119bc65beb1f0 (diff)
parent0230ad1c30a405c807dad5f78c95c57704234ffd (diff)
Merge patch series "Hex value prefix case cleanup"
E Shattow <[email protected]> says: Make consistent use of lowercase hexadecimal prefix '0x' throughout U-Boot. There are a few remaining uses of uppercase 'X' to denote hexadecimal prefix or placeholder in documentation and error messages. External devicetree-rebasing dts/upstream and the generated code of xilinx/zynq are ignored for the series. Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'drivers/phy')
-rw-r--r--drivers/phy/rockchip/phy-rockchip-typec.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c
index c7459dbc5fc..c48a5cd5267 100644
--- a/drivers/phy/rockchip/phy-rockchip-typec.c
+++ b/drivers/phy/rockchip/phy-rockchip-typec.c
@@ -284,7 +284,7 @@ DECLARE_GLOBAL_DATA_PTR;
* clock 0: PLL 0 div 1
* clock 1: PLL 1 div 2
*/
-#define CLK_PLL_CONFIG 0X30
+#define CLK_PLL_CONFIG 0x30
#define CLK_PLL_MASK 0x33
#define CMN_READY BIT(0)