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authorTom Rini <[email protected]>2023-06-12 16:42:37 -0400
committerTom Rini <[email protected]>2023-06-12 16:42:37 -0400
commit7da82de916d6aaeeef62431810cb3335e1207b28 (patch)
tree9d994cb47482d2679acd701ebb09d0caf4b2122f /drivers/phy
parent260d4962e06c0a7d2713523c131416a3f70d7f2c (diff)
parent89240bc0c44b985e461a4220475cb462263df5be (diff)
Merge tag 'xilinx-for-v2023.10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2023.10-rc1 global: - Use proper U-Boot project name Fix sparse warnings in zynqmp-clk, zynqmp handoff, board cmd: - Cover incorrect 0 length entries Versal NET: - Add bootmode logic - Support SPP production version - Add loadpdi command ZynqMP: - Clear pmufw node command ID handling - Change power domain behavior around zynqmp_pmufw_node() - Fix zynqmp cmd return values and pmufw command - Fix R5 tcm init and modes mmc: - Sync Versal NET emmc DT binding pcie: - Add support for ZynqMP PCIe root port video: - Add support for ZynqMP DP tools: - Fix debug message in relocate-rela
Diffstat (limited to 'drivers/phy')
-rw-r--r--drivers/phy/marvell/comphy_cp110.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/phy/marvell/comphy_cp110.c b/drivers/phy/marvell/comphy_cp110.c
index e063b51c6dd..a7e0099045f 100644
--- a/drivers/phy/marvell/comphy_cp110.c
+++ b/drivers/phy/marvell/comphy_cp110.c
@@ -25,7 +25,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define MV_SIP_COMPHY_PLL_LOCK 0x82000003
#define MV_SIP_COMPHY_XFI_TRAIN 0x82000004
-/* Used to distinguish between different possible callers (U-boot/Linux) */
+/* Used to distinguish between different possible callers (U-Boot/Linux) */
#define COMPHY_CALLER_UBOOT (0x1 << 21)
#define COMPHY_FW_MODE_FORMAT(mode) ((mode) << 12)