Merge branch 'next'

Bring in the assorted changes that have been staged in the 'next' branch
prior to release.

Signed-off-by: Tom Rini <[email protected]>

11 files changed, 401 insertions, 25 deletions

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 9c775107e9c..d66aa073927 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -84,6 +84,13 @@ config BCM6368_USBH_PHY
 	help
 	  Support for the Broadcom MIPS BCM6368 USBH PHY.
 
+config BCM_SR_PCIE_PHY
+	bool "Broadcom Stingray PCIe PHY driver"
+	depends on PHY
+	help
+	  Enable this to support the Broadcom Stingray PCIe PHY
+	  If unsure, say N.
+
 config PHY_DA8XX_USB
 	tristate "TI DA8xx USB PHY Driver"
 	depends on PHY && ARCH_DAVINCI
@@ -125,6 +132,12 @@ config STI_USB_PHY
 	  used by USB2 and USB3 Host controllers available on
 	  STiH407 SoC families.
 
+config PHY_QCOM_IPQ4019_USB
+	tristate "Qualcomm IPQ4019 USB PHY driver"
+	depends on PHY && ARCH_IPQ40XX
+	help
+	  Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
+
 config PHY_RCAR_GEN2
 	tristate "Renesas R-Car Gen2 USB PHY"
 	depends on PHY && RCAR_GEN2
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 74e8d931d38..8dabefd776a 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -9,10 +9,12 @@ obj-$(CONFIG_BCM6318_USBH_PHY) += bcm6318-usbh-phy.o
 obj-$(CONFIG_BCM6348_USBH_PHY) += bcm6348-usbh-phy.o
 obj-$(CONFIG_BCM6358_USBH_PHY) += bcm6358-usbh-phy.o
 obj-$(CONFIG_BCM6368_USBH_PHY) += bcm6368-usbh-phy.o
+obj-$(CONFIG_BCM_SR_PCIE_PHY) += phy-bcm-sr-pcie.o
 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
 obj-$(CONFIG_AM654_PHY) += phy-ti-am654.o
 obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o
+obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) += phy-qcom-ipq4019-usb.o
 obj-$(CONFIG_PHY_RCAR_GEN2) += phy-rcar-gen2.o
 obj-$(CONFIG_PHY_RCAR_GEN3) += phy-rcar-gen3.o
 obj-$(CONFIG_PHY_STM32_USBPHYC) += phy-stm32-usbphyc.o
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c
index f050645044c..7b9d3eefc5e 100644
--- a/drivers/phy/allwinner/phy-sun4i-usb.c
+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
@@ -272,13 +272,15 @@ static int sun4i_usb_phy_init(struct phy *phy)
 
 	ret = clk_enable(&usb_phy->clocks);
 	if (ret) {
-		dev_err(dev, "failed to enable usb_%ldphy clock\n", phy->id);
+		dev_err(phy->dev, "failed to enable usb_%ldphy clock\n",
+			phy->id);
 		return ret;
 	}
 
 	ret = reset_deassert(&usb_phy->resets);
 	if (ret) {
-		dev_err(dev, "failed to deassert usb_%ldreset reset\n", phy->id);
+		dev_err(phy->dev, "failed to deassert usb_%ldreset reset\n",
+			phy->id);
 		return ret;
 	}
 
@@ -338,13 +340,15 @@ static int sun4i_usb_phy_exit(struct phy *phy)
 
 	ret = clk_disable(&usb_phy->clocks);
 	if (ret) {
-		dev_err(dev, "failed to disable usb_%ldphy clock\n", phy->id);
+		dev_err(phy->dev, "failed to disable usb_%ldphy clock\n",
+			phy->id);
 		return ret;
 	}
 
 	ret = reset_assert(&usb_phy->resets);
 	if (ret) {
-		dev_err(dev, "failed to assert usb_%ldreset reset\n", phy->id);
+		dev_err(phy->dev, "failed to assert usb_%ldreset reset\n",
+			phy->id);
 		return ret;
 	}
 
diff --git a/drivers/phy/marvell/comphy_core.c b/drivers/phy/marvell/comphy_core.c
index 27bff27ff7e..5e8ce740cd6 100644
--- a/drivers/phy/marvell/comphy_core.c
+++ b/drivers/phy/marvell/comphy_core.c
@@ -98,14 +98,14 @@ static int comphy_probe(struct udevice *dev)
 	chip_cfg->comphy_lanes_count = fdtdec_get_int(blob, node,
 						      "max-lanes", 0);
 	if (chip_cfg->comphy_lanes_count <= 0) {
-		dev_err(&dev->dev, "comphy max lanes is wrong\n");
+		dev_err(dev, "comphy max lanes is wrong\n");
 		return -EINVAL;
 	}
 
 	chip_cfg->comphy_mux_bitcount = fdtdec_get_int(blob, node,
 						       "mux-bitcount", 0);
 	if (chip_cfg->comphy_mux_bitcount <= 0) {
-		dev_err(&dev->dev, "comphy mux bit count is wrong\n");
+		dev_err(dev, "comphy mux bit count is wrong\n");
 		return -EINVAL;
 	}
 
@@ -124,7 +124,7 @@ static int comphy_probe(struct udevice *dev)
 	 * compatible node is found
 	 */
 	if (!chip_cfg->ptr_comphy_chip_init) {
-		dev_err(&dev->dev, "comphy: No compatible DT node found\n");
+		dev_err(dev, "comphy: No compatible DT node found\n");
 		return -ENODEV;
 	}
 
diff --git a/drivers/phy/phy-bcm-sr-pcie.c b/drivers/phy/phy-bcm-sr-pcie.c
new file mode 100644
index 00000000000..36c77c4b639
--- /dev/null
+++ b/drivers/phy/phy-bcm-sr-pcie.c
@@ -0,0 +1,177 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Broadcom
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <asm/io.h>
+#include <linux/bitops.h>
+
+/* we have up to 8 PAXB based RC. The 9th one is always PAXC */
+#define SR_NR_PCIE_PHYS               8
+
+#define PCIE_PIPEMUX_CFG_OFFSET       0x10c
+#define PCIE_PIPEMUX_SELECT_STRAP     GENMASK(3, 0)
+
+#define CDRU_STRAP_DATA_LSW_OFFSET    0x5c
+#define PCIE_PIPEMUX_SHIFT            19
+#define PCIE_PIPEMUX_MASK             GENMASK(3, 0)
+
+/**
+ * struct sr_pcie_phy_core - Stingray PCIe PHY core control
+ *
+ * @dev: pointer to device
+ * @base: base register of PCIe SS
+ * @cdru: CDRU base address
+ * @pipemux: pipemuex strap
+ */
+struct sr_pcie_phy_core {
+	struct udevice *dev;
+	void __iomem *base;
+	void __iomem *cdru;
+	u32 pipemux;
+};
+
+/*
+ * PCIe PIPEMUX lookup table
+ *
+ * Each array index represents a PIPEMUX strap setting
+ * The array element represents a bitmap where a set bit means the PCIe
+ * core and associated serdes has been enabled as RC and is available for use
+ */
+static const u8 pipemux_table[] = {
+	/* PIPEMUX = 0, EP 1x16 */
+	0x00,
+	/* PIPEMUX = 1, EP 1x8 + RC 1x8, core 7 */
+	0x80,
+	/* PIPEMUX = 2, EP 4x4 */
+	0x00,
+	/* PIPEMUX = 3, RC 2x8, cores 0, 7 */
+	0x81,
+	/* PIPEMUX = 4, RC 4x4, cores 0, 1, 6, 7 */
+	0xc3,
+	/* PIPEMUX = 5, RC 8x2, all 8 cores */
+	0xff,
+	/* PIPEMUX = 6, RC 3x4 + 2x2, cores 0, 2, 3, 6, 7 */
+	0xcd,
+	/* PIPEMUX = 7, RC 1x4 + 6x2, cores 0, 2, 3, 4, 5, 6, 7 */
+	0xfd,
+	/* PIPEMUX = 8, EP 1x8 + RC 4x2, cores 4, 5, 6, 7 */
+	0xf0,
+	/* PIPEMUX = 9, EP 1x8 + RC 2x4, cores 6, 7 */
+	0xc0,
+	/* PIPEMUX = 10, EP 2x4 + RC 2x4, cores 1, 6 */
+	0x42,
+	/* PIPEMUX = 11, EP 2x4 + RC 4x2, cores 2, 3, 4, 5 */
+	0x3c,
+	/* PIPEMUX = 12, EP 1x4 + RC 6x2, cores 2, 3, 4, 5, 6, 7 */
+	0xfc,
+	/* PIPEMUX = 13, RC 2x4 + RC 1x4 + 2x2, cores 2, 3, 6 */
+	0x4c,
+};
+
+/*
+ * Return true if the strap setting is valid
+ */
+static bool pipemux_strap_is_valid(u32 pipemux)
+{
+	return !!(pipemux < ARRAY_SIZE(pipemux_table));
+}
+
+/*
+ * Read the PCIe PIPEMUX from strap
+ */
+static u32 pipemux_strap_read(struct sr_pcie_phy_core *core)
+{
+	u32 pipemux;
+
+	/*
+	 * Read PIPEMUX configuration register to determine the pipemux setting
+	 *
+	 * In the case when the value indicates using HW strap, fall back to
+	 * use HW strap
+	 */
+	pipemux = readl(core->base + PCIE_PIPEMUX_CFG_OFFSET);
+	pipemux &= PCIE_PIPEMUX_MASK;
+	if (pipemux == PCIE_PIPEMUX_SELECT_STRAP) {
+		pipemux = readl(core->cdru + CDRU_STRAP_DATA_LSW_OFFSET);
+		pipemux >>= PCIE_PIPEMUX_SHIFT;
+		pipemux &= PCIE_PIPEMUX_MASK;
+	}
+
+	return pipemux;
+}
+
+static int sr_pcie_phy_init(struct phy *phy)
+{
+	struct sr_pcie_phy_core *core = dev_get_priv(phy->dev);
+	unsigned int core_idx = phy->id;
+
+	debug("%s %lx\n", __func__, phy->id);
+	/*
+	 * Check whether this PHY is for root complex or not. If yes, return
+	 * zero so the host driver can proceed to enumeration. If not, return
+	 * an error and that will force the host driver to bail out
+	 */
+	if (!!((pipemux_table[core->pipemux] >> core_idx) & 0x1))
+		return 0;
+
+	return -ENODEV;
+}
+
+static int sr_pcie_phy_xlate(struct phy *phy, struct ofnode_phandle_args *args)
+{
+	debug("%s %d\n", __func__, args->args[0]);
+	if (args->args_count && args->args[0] < SR_NR_PCIE_PHYS)
+		phy->id = args->args[0];
+	else
+		return -ENODEV;
+
+	return 0;
+}
+
+static const struct phy_ops sr_pcie_phy_ops = {
+	.of_xlate = sr_pcie_phy_xlate,
+	.init = sr_pcie_phy_init,
+};
+
+static int sr_pcie_phy_probe(struct udevice *dev)
+{
+	struct sr_pcie_phy_core *core = dev_get_priv(dev);
+
+	core->dev = dev;
+
+	core->base = (void __iomem *)devfdt_get_addr_name(dev, "reg_base");
+	core->cdru = (void __iomem *)devfdt_get_addr_name(dev, "cdru_base");
+	debug("ip base %p\n", core->base);
+	debug("cdru base %p\n", core->cdru);
+
+	/* read the PCIe PIPEMUX strap setting */
+	core->pipemux = pipemux_strap_read(core);
+	if (!pipemux_strap_is_valid(core->pipemux)) {
+		pr_err("invalid PCIe PIPEMUX strap %u\n", core->pipemux);
+		return -EIO;
+	}
+	debug("%s %#x\n", __func__, core->pipemux);
+
+	pr_info("Stingray PCIe PHY driver initialized\n");
+
+	return 0;
+}
+
+static const struct udevice_id sr_pcie_phy_match_table[] = {
+	{ .compatible = "brcm,sr-pcie-phy" },
+	{ }
+};
+
+U_BOOT_DRIVER(sr_pcie_phy) = {
+	.name = "sr-pcie-phy",
+	.id = UCLASS_PHY,
+	.probe = sr_pcie_phy_probe,
+	.of_match = sr_pcie_phy_match_table,
+	.ops = &sr_pcie_phy_ops,
+	.platdata_auto_alloc_size = sizeof(struct sr_pcie_phy_core),
+	.priv_auto_alloc_size = sizeof(struct sr_pcie_phy_core),
+};
diff --git a/drivers/phy/phy-qcom-ipq4019-usb.c b/drivers/phy/phy-qcom-ipq4019-usb.c
new file mode 100644
index 00000000000..465f0d3a01e
--- /dev/null
+++ b/drivers/phy/phy-qcom-ipq4019-usb.c
@@ -0,0 +1,145 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Sartura Ltd.
+ *
+ * Author: Robert Marko <[email protected]>
+ *
+ * Based on Linux driver
+ */
+
+#include <clk.h>
+#include <common.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <log.h>
+#include <reset.h>
+#include <asm/io.h>
+#include <linux/delay.h>
+
+struct ipq4019_usb_phy {
+	phys_addr_t			base;
+	struct reset_ctl	por_rst;
+	struct reset_ctl	srif_rst;
+};
+
+static int ipq4019_ss_phy_power_off(struct phy *_phy)
+{
+	struct ipq4019_usb_phy *phy = dev_get_priv(_phy->dev);
+
+	reset_assert(&phy->por_rst);
+	mdelay(10);
+
+	return 0;
+}
+
+static int ipq4019_ss_phy_power_on(struct phy *_phy)
+{
+	struct ipq4019_usb_phy *phy = dev_get_priv(_phy->dev);
+
+	ipq4019_ss_phy_power_off(_phy);
+
+	reset_deassert(&phy->por_rst);
+
+	return 0;
+}
+
+static struct phy_ops ipq4019_usb_ss_phy_ops = {
+	.power_on = ipq4019_ss_phy_power_on,
+	.power_off = ipq4019_ss_phy_power_off,
+};
+
+static int ipq4019_usb_ss_phy_probe(struct udevice *dev)
+{
+	struct ipq4019_usb_phy *phy = dev_get_priv(dev);
+	int ret;
+
+	phy->base = dev_read_addr(dev);
+	if (phy->base == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	ret = reset_get_by_name(dev, "por_rst", &phy->por_rst);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static const struct udevice_id ipq4019_usb_ss_phy_ids[] = {
+	{ .compatible = "qcom,usb-ss-ipq4019-phy" },
+	{ }
+};
+
+U_BOOT_DRIVER(ipq4019_usb_ss_phy) = {
+	.name		= "ipq4019-usb-ss-phy",
+	.id		= UCLASS_PHY,
+	.of_match	= ipq4019_usb_ss_phy_ids,
+	.ops		= &ipq4019_usb_ss_phy_ops,
+	.probe		= ipq4019_usb_ss_phy_probe,
+	.priv_auto_alloc_size = sizeof(struct ipq4019_usb_phy),
+};
+
+static int ipq4019_hs_phy_power_off(struct phy *_phy)
+{
+	struct ipq4019_usb_phy *phy = dev_get_priv(_phy->dev);
+
+	reset_assert(&phy->por_rst);
+	mdelay(10);
+
+	reset_assert(&phy->srif_rst);
+	mdelay(10);
+
+	return 0;
+}
+
+static int ipq4019_hs_phy_power_on(struct phy *_phy)
+{
+	struct ipq4019_usb_phy *phy = dev_get_priv(_phy->dev);
+
+	ipq4019_hs_phy_power_off(_phy);
+
+	reset_deassert(&phy->srif_rst);
+	mdelay(10);
+
+	reset_deassert(&phy->por_rst);
+
+	return 0;
+}
+
+static struct phy_ops ipq4019_usb_hs_phy_ops = {
+	.power_on = ipq4019_hs_phy_power_on,
+	.power_off = ipq4019_hs_phy_power_off,
+};
+
+static int ipq4019_usb_hs_phy_probe(struct udevice *dev)
+{
+	struct ipq4019_usb_phy *phy = dev_get_priv(dev);
+	int ret;
+
+	phy->base = dev_read_addr(dev);
+	if (phy->base == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	ret = reset_get_by_name(dev, "por_rst", &phy->por_rst);
+	if (ret)
+		return ret;
+
+	ret = reset_get_by_name(dev, "srif_rst", &phy->srif_rst);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static const struct udevice_id ipq4019_usb_hs_phy_ids[] = {
+	{ .compatible = "qcom,usb-hs-ipq4019-phy" },
+	{ }
+};
+
+U_BOOT_DRIVER(ipq4019_usb_hs_phy) = {
+	.name		= "ipq4019-usb-hs-phy",
+	.id		= UCLASS_PHY,
+	.of_match	= ipq4019_usb_hs_phy_ids,
+	.ops		= &ipq4019_usb_hs_phy_ops,
+	.probe		= ipq4019_usb_hs_phy_probe,
+	.priv_auto_alloc_size = sizeof(struct ipq4019_usb_phy),
+};
diff --git a/drivers/phy/phy-stm32-usbphyc.c b/drivers/phy/phy-stm32-usbphyc.c
index c6d30486025..9d4296d6491 100644
--- a/drivers/phy/phy-stm32-usbphyc.c
+++ b/drivers/phy/phy-stm32-usbphyc.c
@@ -311,7 +311,7 @@ static int stm32_usbphyc_of_xlate(struct phy *phy,
 
 	if ((phy->id == 0 && args->args_count != 1) ||
 	    (phy->id == 1 && args->args_count != 2)) {
-		dev_err(dev, "invalid number of cells for phy port%ld\n",
+		dev_err(phy->dev, "invalid number of cells for phy port%ld\n",
 			phy->id);
 		return -EINVAL;
 	}
diff --git a/drivers/phy/phy-ti-am654.c b/drivers/phy/phy-ti-am654.c
index 6907c1afb39..cc73760c8be 100644
--- a/drivers/phy/phy-ti-am654.c
+++ b/drivers/phy/phy-ti-am654.c
@@ -318,13 +318,13 @@ static int serdes_am654_of_xlate(struct phy *x,
 	struct serdes_am654 *phy = dev_get_priv(x->dev);
 
 	if (args->args_count != 2) {
-		dev_err(phy->dev, "Invalid DT PHY argument count: %d\n",
+		dev_err(x->dev, "Invalid DT PHY argument count: %d\n",
 			args->args_count);
 		return -EINVAL;
 	}
 
 	if (args->args[0] != PHY_TYPE_PCIE) {
-		dev_err(phy->dev, "Unrecognized PHY type: %d\n",
+		dev_err(x->dev, "Unrecognized PHY type: %d\n",
 			args->args[0]);
 		return -EINVAL;
 	}
diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c
index db7f39cd0b4..8f456f33d27 100644
--- a/drivers/phy/phy-uclass.c
+++ b/drivers/phy/phy-uclass.c
@@ -117,56 +117,91 @@ int generic_phy_get_by_name(struct udevice *dev, const char *phy_name,
 int generic_phy_init(struct phy *phy)
 {
 	struct phy_ops const *ops;
+	int ret;
 
 	if (!generic_phy_valid(phy))
 		return 0;
 	ops = phy_dev_ops(phy->dev);
+	if (!ops->init)
+		return 0;
+	ret = ops->init(phy);
+	if (ret)
+		dev_err(phy->dev, "PHY: Failed to init %s: %d.\n",
+			phy->dev->name, ret);
 
-	return ops->init ? ops->init(phy) : 0;
+	return ret;
 }
 
 int generic_phy_reset(struct phy *phy)
 {
 	struct phy_ops const *ops;
+	int ret;
 
 	if (!generic_phy_valid(phy))
 		return 0;
 	ops = phy_dev_ops(phy->dev);
+	if (!ops->reset)
+		return 0;
+	ret = ops->reset(phy);
+	if (ret)
+		dev_err(phy->dev, "PHY: Failed to reset %s: %d.\n",
+			phy->dev->name, ret);
 
-	return ops->reset ? ops->reset(phy) : 0;
+	return ret;
 }
 
 int generic_phy_exit(struct phy *phy)
 {
 	struct phy_ops const *ops;
+	int ret;
 
 	if (!generic_phy_valid(phy))
 		return 0;
 	ops = phy_dev_ops(phy->dev);
+	if (!ops->exit)
+		return 0;
+	ret = ops->exit(phy);
+	if (ret)
+		dev_err(phy->dev, "PHY: Failed to exit %s: %d.\n",
+			phy->dev->name, ret);
 
-	return ops->exit ? ops->exit(phy) : 0;
+	return ret;
 }
 
 int generic_phy_power_on(struct phy *phy)
 {
 	struct phy_ops const *ops;
+	int ret;
 
 	if (!generic_phy_valid(phy))
 		return 0;
 	ops = phy_dev_ops(phy->dev);
+	if (!ops->power_on)
+		return 0;
+	ret = ops->power_on(phy);
+	if (ret)
+		dev_err(phy->dev, "PHY: Failed to power on %s: %d.\n",
+			phy->dev->name, ret);
 
-	return ops->power_on ? ops->power_on(phy) : 0;
+	return ret;
 }
 
 int generic_phy_power_off(struct phy *phy)
 {
 	struct phy_ops const *ops;
+	int ret;
 
 	if (!generic_phy_valid(phy))
 		return 0;
 	ops = phy_dev_ops(phy->dev);
+	if (!ops->power_off)
+		return 0;
+	ret = ops->power_off(phy);
+	if (ret)
+		dev_err(phy->dev, "PHY: Failed to power off %s: %d.\n",
+			phy->dev->name, ret);
 
-	return ops->power_off ? ops->power_off(phy) : 0;
+	return ret;
 }
 
 int generic_phy_get_bulk(struct udevice *dev, struct phy_bulk *bulk)
diff --git a/drivers/phy/rockchip/phy-rockchip-pcie.c b/drivers/phy/rockchip/phy-rockchip-pcie.c
index 83928cffe06..617943fd821 100644
--- a/drivers/phy/rockchip/phy-rockchip-pcie.c
+++ b/drivers/phy/rockchip/phy-rockchip-pcie.c
@@ -98,7 +98,7 @@ static int rockchip_pcie_phy_power_on(struct phy *phy)
 
 	ret = reset_deassert(&priv->phy_rst);
 	if (ret) {
-		dev_err(dev, "failed to assert phy reset\n");
+		dev_err(phy->dev, "failed to assert phy reset\n");
 		return ret;
 	}
 
@@ -119,7 +119,7 @@ static int rockchip_pcie_phy_power_on(struct phy *phy)
 				       20 * 1000,
 				       50);
 	if (ret) {
-		dev_err(&priv->dev, "pll lock timeout!\n");
+		dev_err(phy->dev, "pll lock timeout!\n");
 		goto err_pll_lock;
 	}
 
@@ -133,7 +133,7 @@ static int rockchip_pcie_phy_power_on(struct phy *phy)
 				       20 * 1000,
 				       50);
 	if (ret) {
-		dev_err(&priv->dev, "pll output enable timeout!\n");
+		dev_err(phy->dev, "pll output enable timeout!\n");
 		goto err_pll_lock;
 	}
 
@@ -149,7 +149,7 @@ static int rockchip_pcie_phy_power_on(struct phy *phy)
 				       20 * 1000,
 				       50);
 	if (ret) {
-		dev_err(&priv->dev, "pll relock timeout!\n");
+		dev_err(phy->dev, "pll relock timeout!\n");
 		goto err_pll_lock;
 	}
 
@@ -173,7 +173,7 @@ static int rockchip_pcie_phy_power_off(struct phy *phy)
 
 	ret = reset_assert(&priv->phy_rst);
 	if (ret) {
-		dev_err(dev, "failed to assert phy reset\n");
+		dev_err(phy->dev, "failed to assert phy reset\n");
 		return ret;
 	}
 
@@ -187,13 +187,13 @@ static int rockchip_pcie_phy_init(struct phy *phy)
 
 	ret = clk_enable(&priv->refclk);
 	if (ret) {
-		dev_err(dev, "failed to enable refclk clock\n");
+		dev_err(phy->dev, "failed to enable refclk clock\n");
 		return ret;
 	}
 
 	ret = reset_assert(&priv->phy_rst);
 	if (ret) {
-		dev_err(dev, "failed to assert phy reset\n");
+		dev_err(phy->dev, "failed to assert phy reset\n");
 		goto err_reset;
 	}
 
diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c
index c9c8e1c5428..da00daa4476 100644
--- a/drivers/phy/rockchip/phy-rockchip-typec.c
+++ b/drivers/phy/rockchip/phy-rockchip-typec.c
@@ -448,7 +448,7 @@ static void rockchip_tcphy_rx_usb3_cfg_lane(struct rockchip_tcphy *priv,
 	writel(0xfb, priv->reg_base + XCVR_DIAG_BIDI_CTRL(lane));
 }
 
-static int rockchip_tcphy_init(struct rockchip_tcphy *priv)
+static int rockchip_tcphy_init(struct phy *phy, struct rockchip_tcphy *priv)
 {
 	const struct rockchip_usb3phy_port_cfg *cfg = priv->port_cfgs;
 	u32 val;
@@ -559,9 +559,9 @@ static int rockchip_usb3_phy_power_on(struct phy *phy)
 		return 0;
 
 	if (priv->mode == MODE_DISCONNECT) {
-		ret = rockchip_tcphy_init(priv);
+		ret = rockchip_tcphy_init(phy, priv);
 		if (ret) {
-			dev_err(dev, "failed to init tcphy (ret=%d)\n", ret);
+			dev_err(phy->dev, "failed to init tcphy (ret=%d)\n", ret);
 			return ret;
 		}
 	}