diff options
| author | Tom Rini <[email protected]> | 2021-01-05 16:20:26 -0500 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2021-01-05 16:20:26 -0500 |
| commit | 720620e6916ba40b9a173bb07706d2c73f3c23e7 (patch) | |
| tree | b085821f1d1137d80e9bb73f405ea0680db338b9 /drivers/pinctrl | |
| parent | c86b18074c9d40bfa63cda1068b6dfb810d4377d (diff) | |
| parent | 62b07b5173e3d04fabfac42cf1f4779d021f94ad (diff) | |
Merge tag 'v2021.01-rc5' into next
Prepare v2021.01-rc5
Signed-off-by: Tom Rini <[email protected]>
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/meson/pinctrl-meson.c | 4 | ||||
| -rw-r--r-- | drivers/pinctrl/pinctrl-sti.c | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index 37bddb14e08..b11a40e11a3 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -216,13 +216,13 @@ static int meson_pinconf_bias_set(struct udevice *dev, unsigned int pin, } /* othewise, enable the bias and select level */ - clrsetbits_le32(priv->reg_pullen + reg, BIT(bit), 1); + clrsetbits_le32(priv->reg_pullen + reg, BIT(bit), BIT(bit)); ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_PULL, ®, &bit); if (ret) return ret; clrsetbits_le32(priv->reg_pull + reg, BIT(bit), - param == PIN_CONFIG_BIAS_PULL_UP); + (param == PIN_CONFIG_BIAS_PULL_UP ? BIT(bit) : 0)); return 0; } diff --git a/drivers/pinctrl/pinctrl-sti.c b/drivers/pinctrl/pinctrl-sti.c index aaaa6bdadf7..c5baf5d211e 100644 --- a/drivers/pinctrl/pinctrl-sti.c +++ b/drivers/pinctrl/pinctrl-sti.c @@ -3,7 +3,7 @@ * Pinctrl driver for STMicroelectronics STi SoCs * * Copyright (C) 2017, STMicroelectronics - All Rights Reserved - * Author(s): Patrice Chotard, <[email protected]> for STMicroelectronics. + * Author(s): Patrice Chotard, <[email protected]> for STMicroelectronics. */ #include <common.h> |