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authorTom Rini <[email protected]>2026-06-29 13:44:52 -0600
committerTom Rini <[email protected]>2026-06-29 15:29:56 -0600
commit0d8e33717d7e5b2a4034cc88f18bf233f77801e7 (patch)
tree2ec6524c4386254d6abff755ce88759f5a01975c /drivers/ram
parentd5046398433e48e7b0b664c1ee3e4e2af6f861a8 (diff)
parent4a72fd9fb09109857303ca64fd259009e1d4b554 (diff)
Merge patch series "arm: aspeed: add initial AST2700 SoC support"
Ryan Chen <[email protected]> says: AST2700 is the 8th generation of Integrated Remote Management Processor introduced by ASPEED Technology Inc. It is a Board Management Controller (BMC) SoC family with a dual-die architecture: SoC0 ("CPU" die with four ARM Cortex-A35 application cores) and SoC1 ("IO" die with peripherals) each SoC have its own SCU PLLs, clock dividers and reset domains. Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'drivers/ram')
-rw-r--r--drivers/ram/aspeed/Kconfig2
-rw-r--r--drivers/ram/aspeed/Makefile1
-rw-r--r--drivers/ram/aspeed/sdram_ast2700.c15
3 files changed, 12 insertions, 6 deletions
diff --git a/drivers/ram/aspeed/Kconfig b/drivers/ram/aspeed/Kconfig
index 023444b700c..fa5c890bb7a 100644
--- a/drivers/ram/aspeed/Kconfig
+++ b/drivers/ram/aspeed/Kconfig
@@ -77,7 +77,7 @@ choice
prompt "AST2700 DDR target date rate"
default ASPEED_DDR_3200
depends on ASPEED_RAM
- depends on TARGET_ASPEED_AST2700_IBEX
+ depends on ASPEED_AST2700 || TARGET_ASPEED_AST2700_IBEX
config ASPEED_DDR_1600
bool "1600 Mbps"
diff --git a/drivers/ram/aspeed/Makefile b/drivers/ram/aspeed/Makefile
index 1f0b22c8e9f..d29e2154ce9 100644
--- a/drivers/ram/aspeed/Makefile
+++ b/drivers/ram/aspeed/Makefile
@@ -2,4 +2,5 @@
#
obj-$(CONFIG_ASPEED_AST2500) += sdram_ast2500.o
obj-$(CONFIG_ASPEED_AST2600) += sdram_ast2600.o
+obj-$(CONFIG_ASPEED_AST2700) += sdram_ast2700.o
obj-$(CONFIG_TARGET_ASPEED_AST2700_IBEX) += sdram_ast2700.o
diff --git a/drivers/ram/aspeed/sdram_ast2700.c b/drivers/ram/aspeed/sdram_ast2700.c
index 00974da52bb..8605a92abb2 100644
--- a/drivers/ram/aspeed/sdram_ast2700.c
+++ b/drivers/ram/aspeed/sdram_ast2700.c
@@ -14,6 +14,11 @@
#include <linux/sizes.h>
#include <ram.h>
+__weak int fmc_hdr_get_prebuilt(u32 type, u32 *ofst, u32 *size)
+{
+ return -ENOSYS;
+}
+
enum ddr_type {
DDR4_1600 = 0x0,
DDR4_2400,
@@ -128,13 +133,13 @@ static size_t ast2700_sdrammc_get_vga_mem_size(struct sdrammc *sdrammc)
reg = readl(scu0 + SCU0_PCI_MISC70);
if (reg & SCU0_PCI_MISC70_EN_PCIEVGA0) {
- debug("VGA0:%dMB\n", vga_memsz[sel] / SZ_1M);
+ debug("VGA0:%zuMB\n", vga_memsz[sel] / SZ_1M);
dual++;
}
reg = readl(scu0 + SCU0_PCI_MISC80);
if (reg & SCU0_PCI_MISC80_EN_PCIEVGA1) {
- debug("VGA1:%dMB\n", vga_memsz[sel] / SZ_1M);
+ debug("VGA1:%zuMB\n", vga_memsz[sel] / SZ_1M);
dual++;
}
@@ -560,7 +565,7 @@ void dwc_get_mailbox(struct sdrammc *sdrammc, const int mode, u32 *mbox)
dwc_ddrphy_apb_wr(0xd0031, 1);
}
-uint32_t dwc_readMsgBlock(struct sdrammc *sdrammc, const u32 addr_half)
+u32 dwc_readMsgBlock(struct sdrammc *sdrammc, const u32 addr_half)
{
u32 data_word;
@@ -727,7 +732,7 @@ int dwc_ddrphy_phyinit_userCustom_D_loadIMEM(struct sdrammc *sdrammc, const int
fmc_hdr_get_prebuilt(pb_type, &imem_ofst, &imem_size);
memcpy(sdrammc->phy + (DWC_PHY_IMEM_OFST << 1),
- (void *)(0x20000000 + imem_ofst), imem_size);
+ (void *)(uintptr_t)(0x20000000 + imem_ofst), imem_size);
return 0;
}
@@ -746,7 +751,7 @@ int dwc_ddrphy_phyinit_userCustom_F_loadDMEM(struct sdrammc *sdrammc,
fmc_hdr_get_prebuilt(pb_type, &dmem_ofst, &dmem_size);
memcpy(sdrammc->phy + (DWC_PHY_DMEM_OFST << 1),
- (void *)(0x20000000 + dmem_ofst), dmem_size);
+ (void *)(uintptr_t)(0x20000000 + dmem_ofst), dmem_size);
return 0;
}