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| author | Tom Rini <[email protected]> | 2026-06-22 16:42:41 -0600 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2026-06-22 16:42:41 -0600 |
| commit | 9f16b258e5632d74fa4a1c2c93bea4474e05234b (patch) | |
| tree | d7c5baa0d3c6027e9e43b16030e4e0ecd43b9d77 /drivers/reset | |
| parent | 298d44464dc63a4f3f5489150acd7958f359f9bd (diff) | |
| parent | f072620dc9ffda00b010783da27c41231c3a439b (diff) | |
Merge tag 'v2026.07-rc5' into next
Prepare v2026.07-rc5
Diffstat (limited to 'drivers/reset')
| -rw-r--r-- | drivers/reset/Kconfig | 9 | ||||
| -rw-r--r-- | drivers/reset/Makefile | 2 |
2 files changed, 10 insertions, 1 deletions
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 485f907b041..e7c0870c918 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -116,6 +116,15 @@ config RESET_ROCKCHIP though is that some reset signals, like I2C or MISC reset multiple devices. +config SPL_RESET_ROCKCHIP + bool "SPL reset controller driver for Rockchip SoCs" + depends on SPL_DM_RESET && ARCH_ROCKCHIP && SPL_CLK + default y + help + Support for the reset controller on Rockchip SoCs in SPL. Select this + if you observe any reset-related warnings or errors when booting SPL, + such as when using UFS storage + config RESET_HSDK bool "Synopsys HSDK Reset Driver" depends on DM_RESET && TARGET_HSDK diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index c369bdb3d6c..2c83f858895 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -18,7 +18,7 @@ obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o obj-$(CONFIG_RESET_AST2500) += reset-ast2500.o obj-$(CONFIG_RESET_AST2600) += reset-ast2600.o -obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o rst-rk3506.o rst-rk3528.o rst-rk3576.o rst-rk3588.o +obj-$(CONFIG_$(PHASE_)RESET_ROCKCHIP) += reset-rockchip.o rst-rk3506.o rst-rk3528.o rst-rk3576.o rst-rk3588.o obj-$(CONFIG_RESET_MESON) += reset-meson.o obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o obj-$(CONFIG_RESET_MEDIATEK) += reset-mediatek.o |