diff options
| author | Tom Rini <[email protected]> | 2026-03-24 09:15:03 -0600 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2026-03-24 09:15:03 -0600 |
| commit | 075bd023c77ffc1e099790fb2174d646ae5acf1f (patch) | |
| tree | 639270ce5c0bc42a03782438bcb28dbd32e1827a /drivers/serial | |
| parent | eb95914b9f5886b7ca0eaa2dbcd8a66bb8e5f81a (diff) | |
| parent | 1cf505e51b49438271f4b36a648b93b618f13a8e (diff) | |
Merge tag 'qcom-fixes-24Mar2026' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
- Assorted Qualcomm platform fixes
Diffstat (limited to 'drivers/serial')
| -rw-r--r-- | drivers/serial/serial_msm_geni.c | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/drivers/serial/serial_msm_geni.c b/drivers/serial/serial_msm_geni.c index bb5a2cb4d2c..3dca581f68f 100644 --- a/drivers/serial/serial_msm_geni.c +++ b/drivers/serial/serial_msm_geni.c @@ -212,7 +212,7 @@ static int msm_serial_setbrg(struct udevice *dev, int baud) ret = clk_set_rate(priv->se, clk_rate); if (ret < 0) { pr_err("%s: Couldn't set clock rate: %d\n", __func__, ret); - return ret; + return 0; } geni_serial_baud(priv->base, clk_div, baud); @@ -517,13 +517,14 @@ static int msm_serial_probe(struct udevice *dev) u32 proto; struct clk *clk; - clk = devm_clk_get(dev, NULL); + clk = devm_clk_get_optional(dev, NULL); if (IS_ERR(clk)) - return PTR_ERR(clk); - priv->se = clk; + dev_dbg(dev, "Couldn't find UART clock: %ld", PTR_ERR(clk)); + else + priv->se = clk; /* Try enable clock */ - ret = clk_enable(clk); + clk_enable(clk); /* Check if firmware loading is needed (BT UART) */ proto = readl(priv->base + GENI_FW_REVISION_RO); @@ -547,10 +548,6 @@ static int msm_serial_probe(struct udevice *dev) if (ofnode_device_is_compatible(dev_ofnode(dev), "qcom,geni-uart")) return -ENOENT; - /* Now handle clock enable return value */ - if (ret) - return ret; - ret = geni_set_oversampling(dev); if (ret < 0) return ret; |