diff options
| author | Stephan Gerhold <[email protected]> | 2025-09-08 13:31:24 +0200 |
|---|---|---|
| committer | Casey Connolly <[email protected]> | 2025-10-29 12:27:33 +0100 |
| commit | eac35b90271537836c6fc37dd4e4e3cba7244b93 (patch) | |
| tree | da8cf2833223382f1ec7f1cd15a3ba0b48e00531 /drivers/serial | |
| parent | a8f5b34ec5787ab44471446ffc6391b0fd94ff42 (diff) | |
serial: msm: Reset after writing to DMEN
According to the documentation of the UART controller in the APQ8016E TRM,
clearing bits inside UARTDM_DMEN requires resetting the transmitter and/or
receiver. We do reset inside uart_dm_init(), but before writing to
UARTDM_DMEN. This doesn't seem to cause problems in practice, but let's
move the reset to the end of uart_dm_init() to better match the
recommendations in the documentation.
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Stephan Gerhold <[email protected]>
Tested-by: Alexey Minnekhanov <[email protected]>
Acked-by: Sumit Garg <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
Diffstat (limited to 'drivers/serial')
| -rw-r--r-- | drivers/serial/serial_msm.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c index aa4d10e7c51..5523ec4afe1 100644 --- a/drivers/serial/serial_msm.c +++ b/drivers/serial/serial_msm.c @@ -219,11 +219,12 @@ static void uart_dm_init(struct msm_serial_data *priv) /* Enable RS232 flow control to support RS232 db9 connector */ writel(UARTDM_MR1_RX_RDY_CTL, priv->base + UARTDM_MR1); writel(UARTDM_MR2_8_N_1_MODE, priv->base + UARTDM_MR2); - writel(UARTDM_CR_CMD_RESET_RX, priv->base + UARTDM_CR); - writel(UARTDM_CR_CMD_RESET_TX, priv->base + UARTDM_CR); /* Make sure BAM/single character mode is disabled */ writel(0x0, priv->base + UARTDM_DMEN); + + writel(UARTDM_CR_CMD_RESET_RX, priv->base + UARTDM_CR); + writel(UARTDM_CR_CMD_RESET_TX, priv->base + UARTDM_CR); } static int msm_serial_probe(struct udevice *dev) { |