diff options
| author | Tom Rini <[email protected]> | 2023-10-05 13:26:44 -0400 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2023-10-05 13:26:44 -0400 |
| commit | be2abe73df58a35da9e8d5afb13fccdf1b0faa8e (patch) | |
| tree | a41b676d6169cd846d33dcf18c8e8c6ea181784c /drivers/timer/Kconfig | |
| parent | cb59d23584a7a0f2431025a56f4938d424c49ca5 (diff) | |
| parent | 7cfdacbe8020292845bd5eba63b576b8586c433c (diff) | |
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
+ ae350: modify memory layout and target name
+ ae350: use generic RISC-V timer driver in S-mode
+ Support bootstage report for RISC-V
+ Support C extension exception command for RISC-V
+ Add Starfive timer support
Diffstat (limited to 'drivers/timer/Kconfig')
| -rw-r--r-- | drivers/timer/Kconfig | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index 915b2af160c..60519c3b536 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -59,7 +59,14 @@ config ALTERA_TIMER config ANDES_PLMT_TIMER bool - depends on RISCV_MMODE || SPL_RISCV_MMODE + depends on RISCV_MMODE + help + The Andes PLMT block holds memory-mapped mtime register + associated with timer tick. + +config SPL_ANDES_PLMT_TIMER + bool + depends on SPL_RISCV_MMODE help The Andes PLMT block holds memory-mapped mtime register associated with timer tick. @@ -326,4 +333,11 @@ config XILINX_TIMER Select this to enable support for the timer found on any Xilinx boards (axi timer). +config STARFIVE_TIMER + bool "Starfive timer support" + depends on TIMER + help + Select this to enable support for the timer found on + Starfive SoC. + endmenu |