Merge tag 'xilinx-for-v2023.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2023.01-rc3

microblaze:
- Enable 32 bit addressing mode for SPIs

zynq:
- Minor DT fixes (PL clock enabling)

zynqmp:
- Disable watchdog by default
- Remove unused xlnx,eeprom chosen support
- Add missing symlink for vck190 SC revB
- Use mdio bus with ethernet-phy-id description

versal:
- Add mini qspi/ospi configuration

versal-net:
- Add soc driver
- Fix Kconfig entry for SOC
- Fix loading address location for MINI configuration
- Disable LMB for mini configuration

net:
- Fix ethernet-phy-id usage in the code

pinctrl:
- Revert high impedance/output enable support

timer:
- Fix timer relocation for Microblaze
- Fix timer wrap in 32bit Xilinx timer driver

1 files changed, 15 insertions, 1 deletions

diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c
index cbc36476987..bb719792135 100644
--- a/drivers/timer/timer-uclass.c
+++ b/drivers/timer/timer-uclass.c
@@ -18,6 +18,7 @@
 #include <init.h>
 #include <timer.h>
 #include <linux/err.h>
+#include <relocate.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -32,7 +33,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int notrace timer_get_count(struct udevice *dev, u64 *count)
 {
-	const struct timer_ops *ops = device_get_ops(dev);
+	struct timer_ops *ops = timer_get_ops(dev);
 
 	if (!ops->get_count)
 		return -ENOSYS;
@@ -50,6 +51,19 @@ unsigned long notrace timer_get_rate(struct udevice *dev)
 
 static int timer_pre_probe(struct udevice *dev)
 {
+	if (IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC) &&
+	    (gd->flags & GD_FLG_RELOC)) {
+		struct timer_ops *ops = timer_get_ops(dev);
+		static int reloc_done;
+
+		if (!reloc_done) {
+			if (ops->get_count)
+				MANUAL_RELOC(ops->get_count);
+
+			reloc_done++;
+		}
+	}
+
 	if (CONFIG_IS_ENABLED(OF_REAL)) {
 		struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
 		struct clk timer_clk;