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authorTom Rini <[email protected]>2021-08-02 21:35:50 -0400
committerTom Rini <[email protected]>2021-08-02 21:35:50 -0400
commit3b64774323298362f9833aac75bb4639b4f98999 (patch)
tree34a6428754d442d5559a7131ff27225ec7c0663a /drivers/timer
parent51aef405550e603ff702c034f0e2cd0f15bdf2bb (diff)
parent9feb5bdcc07b27806df07fd6b9260bb5cdef072d (diff)
Merge https://source.denx.de/u-boot/custodians/u-boot-x86
- Fixed broken ICH SPI driver in software sequencer mode - Added "m25p,fast-read" to SPI flash node for x86 boards - Drop ROM_NEEDS_BLOBS and BUILD_ROM for x86 ROM builds - Define a default TSC timer frequency for all x86 boards - x86 MTRR MSR programming codes bug fixes - x86 "hob" command bug fixes - Don't program MTRR for DRAM for FSP1 - Move INIT_PHASE_END_FIRMWARE to FSP2 - Use external graphics card by default on Intel Crown Bay - tangier: Fix DMA controller IRQ polarity in CSRT
Diffstat (limited to 'drivers/timer')
-rw-r--r--drivers/timer/Kconfig8
-rw-r--r--drivers/timer/tsc_timer.c5
2 files changed, 7 insertions, 6 deletions
diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index ee81dfa7768..89131426542 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -124,12 +124,12 @@ config RENESAS_OSTM_TIMER
Enables support for the Renesas OSTM Timer driver.
This timer is present on Renesas RZ/A1 R7S72100 SoCs.
-config X86_TSC_TIMER_EARLY_FREQ
- int "x86 TSC timer frequency in MHz when used as the early timer"
+config X86_TSC_TIMER_FREQ
+ int "x86 TSC timer frequency in Hz"
depends on X86_TSC_TIMER
- default 1000
+ default 1000000000
help
- Sets the estimated CPU frequency in MHz when TSC is used as the
+ Sets the estimated CPU frequency in Hz when TSC is used as the
early timer and the frequency can neither be calibrated via some
hardware ways, nor got from device tree at the time when device
tree is not available yet.
diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c
index 7d19a99622b..adef50c3744 100644
--- a/drivers/timer/tsc_timer.c
+++ b/drivers/timer/tsc_timer.c
@@ -425,12 +425,13 @@ static void tsc_timer_ensure_setup(bool early)
goto done;
if (early)
- fast_calibrate = CONFIG_X86_TSC_TIMER_EARLY_FREQ;
+ gd->arch.clock_rate = CONFIG_X86_TSC_TIMER_FREQ;
else
return;
done:
- gd->arch.clock_rate = fast_calibrate * 1000000;
+ if (!gd->arch.clock_rate)
+ gd->arch.clock_rate = fast_calibrate * 1000000;
}
gd->arch.tsc_inited = true;
}