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authorTom Rini <[email protected]>2025-10-29 07:40:40 -0600
committerTom Rini <[email protected]>2025-10-29 07:40:40 -0600
commit75253c898570f1daf2c7fba7c48caa02b380f00f (patch)
tree97768f4874a8214ef1fad1a22e087144f1f4c4a8 /drivers/timer
parent96b95a05b7a482b6a21d59dcd6060f414f2f0e58 (diff)
parente1c05c00696a12c02674c1cd977d7c64900c5c58 (diff)
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-riscv
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/28051 - riscv: dts: starfive: cherry-pick jh7110 updates from v6.18-rc1-dts - riscv: Add upstream boards Milk-V Mars CM and Mars CM Lite - timer: sifive_clint: Add GHRTv2 compaible string
Diffstat (limited to 'drivers/timer')
-rw-r--r--drivers/timer/riscv_aclint_timer.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/timer/riscv_aclint_timer.c b/drivers/timer/riscv_aclint_timer.c
index 35da1ea2fd2..175956bcfd3 100644
--- a/drivers/timer/riscv_aclint_timer.c
+++ b/drivers/timer/riscv_aclint_timer.c
@@ -83,6 +83,7 @@ static int riscv_aclint_timer_probe(struct udevice *dev)
static const struct udevice_id riscv_aclint_timer_ids[] = {
{ .compatible = "riscv,clint0", .data = CLINT_MTIME_OFFSET },
{ .compatible = "sifive,clint0", .data = CLINT_MTIME_OFFSET },
+ { .compatible = "sifive,clint2", .data = CLINT_MTIME_OFFSET },
{ .compatible = "riscv,aclint-mtimer", .data = ACLINT_MTIME_OFFSET },
{ }
};