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authorMarek Vasut <[email protected]>2020-12-01 11:29:18 +0100
committerPatrick Delaunay <[email protected]>2020-12-09 10:57:50 +0100
commit75df748b87f86e87a4393d8ebc274e5806f2079a (patch)
tree063eb581720ddb3b2462c314dc28367b86399bf9 /drivers/timer
parent845c6720eca92be09127f7d306349ab31dbf372d (diff)
ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock
The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter or without one on the SDMMC1 interface. Because the SDMMC1 interface is limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback clock to permit operation of the same U-Boot image on both SoM with and without voltage level shifter. Signed-off-by: Marek Vasut <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Reviewed-by: Patrick Delaunay <[email protected]>
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