Merge tag 'xilinx-for-v2023.01-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2023.01-rc1

cmd:
- bdinfo - guard LMB code to run only when LMB is enabled

timer:
- convert arm twd timer to DM

power-domain:
- Skip loading config object for Versal

xilinx:
- Fix logic when dfu_alt_info is generated
- Define only mmc devnum not partition
- Add xlnx prefix to GEM compatible string
- Add missing tca6416 to zynqmp SC - vck190
- Add env redund offset
- Enable CMD_GREPENV/SETEXPR by default
- Move board_get_usable_ram_top() to common location
- Add support for SOC detection

net/gem:
- Check rate before setting it up

microblaze:
- drop CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE
- Show cache size in bdinfo

spi:
- cadence_qspi: driver updates
- zynqmp_gqspi: driver updates
- zynqmp_gqspi: Add tap delays for Versal

zynq:
- Enable mkeficapsule compilation
- Use CONFIG_SPL_FS_LOAD_PAYLOAD_NAME for dfu_alt_info
- Align bss and end of u-boot image to 64bits
- Align qspi node name with Linux kernel
- DT: List OCM memory

zynqmp:
- Fix AES cache handling with a user provided key
- SOM: Add mtd partition for secure OS storage area
- Add ref_clk property for REFCLKPER calculation
- Fix mdio bus description for vck190-sc

xilinx-mini:
- Remove unneeded configs
- Disable LMB

versal:
- Enable i2c mux pca954x by default
- Define CONFIG_CQSPI_REF_CLK
- Enable power domain driver
- Enable zynqmp_gqspi driver

3 files changed, 115 insertions, 0 deletions

diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index 40492901481..1b492360396 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -73,6 +73,12 @@ config ARC_TIMER
 	  usually at least one of them exists. Either of them is supported
 	  in U-Boot.
 
+config ARM_TWD_TIMER
+	bool "ARM timer watchdog (TWD) timer support"
+	depends on TIMER && CLK
+	help
+	  Select this to enable support for the ARM global timer watchdog timer.
+
 config AST_TIMER
 	bool "Aspeed ast2400/ast2500 timer support"
 	depends on TIMER
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index 560e2d27e14..7bfb7749e97 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -6,6 +6,7 @@ obj-y += timer-uclass.o
 obj-$(CONFIG_ALTERA_TIMER)	+= altera_timer.o
 obj-$(CONFIG_ANDES_PLMT_TIMER) += andes_plmt_timer.o
 obj-$(CONFIG_ARC_TIMER)	+= arc_timer.o
+obj-$(CONFIG_ARM_TWD_TIMER)	+= arm_twd_timer.o
 obj-$(CONFIG_AST_TIMER)	+= ast_timer.o
 obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o
 obj-$(CONFIG_$(SPL_)ATMEL_PIT_TIMER) += atmel_pit_timer.o
diff --git a/drivers/timer/arm_twd_timer.c b/drivers/timer/arm_twd_timer.c
new file mode 100644
index 00000000000..40ccd165874
--- /dev/null
+++ b/drivers/timer/arm_twd_timer.c
@@ -0,0 +1,108 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2017-2022 Weidmüller Interface GmbH & Co. KG
+ * Stefan Herbrechtsmeier <[email protected]>
+ *
+ * Copyright (C) 2012 Michal Simek <[email protected]>
+ * Copyright (C) 2011-2017 Xilinx, Inc. All rights reserved.
+ *
+ * (C) Copyright 2008
+ * Guennadi Liakhovetki, DENX Software Engineering, <[email protected]>
+ *
+ * (C) Copyright 2004
+ * Philippe Robin, ARM Ltd. <[email protected]>
+ *
+ * (C) Copyright 2002-2004
+ * Gary Jennejohn, DENX Software Engineering, <[email protected]>
+ *
+ * (C) Copyright 2003
+ * Texas Instruments <www.ti.com>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <[email protected]>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Alex Zuepke <[email protected]>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <timer.h>
+#include <linux/bitops.h>
+
+#include <asm/io.h>
+
+#define SCUTIMER_CONTROL_PRESCALER_MASK		0x0000FF00 /* Prescaler */
+#define SCUTIMER_CONTROL_AUTO_RELOAD_MASK	0x00000002 /* Auto-reload */
+#define SCUTIMER_CONTROL_ENABLE_MASK		0x00000001 /* Timer enable */
+
+#define TIMER_LOAD_VAL 0xFFFFFFFF
+
+struct arm_twd_timer_regs {
+	u32 load; /* Timer Load Register */
+	u32 counter; /* Timer Counter Register */
+	u32 control; /* Timer Control Register */
+};
+
+struct arm_twd_timer_priv {
+	struct arm_twd_timer_regs *base;
+};
+
+static u64 arm_twd_timer_get_count(struct udevice *dev)
+{
+	struct arm_twd_timer_priv *priv = dev_get_priv(dev);
+	struct arm_twd_timer_regs *regs = priv->base;
+	u32 count = TIMER_LOAD_VAL - readl(&regs->counter);
+
+	return timer_conv_64(count);
+}
+
+static int arm_twd_timer_probe(struct udevice *dev)
+{
+	struct arm_twd_timer_priv *priv = dev_get_priv(dev);
+	struct arm_twd_timer_regs *regs;
+	fdt_addr_t addr;
+
+	addr = dev_read_addr(dev);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	priv->base = (struct arm_twd_timer_regs *)addr;
+
+	regs = priv->base;
+
+	/* Load the timer counter register */
+	writel(0xFFFFFFFF, &regs->load);
+
+	/*
+	 * Start the A9Timer device
+	 * Enable Auto reload mode, Clear prescaler control bits
+	 * Set prescaler value, Enable the decrementer
+	 */
+	clrsetbits_le32(&regs->control, SCUTIMER_CONTROL_PRESCALER_MASK,
+			SCUTIMER_CONTROL_AUTO_RELOAD_MASK |
+			SCUTIMER_CONTROL_ENABLE_MASK);
+
+	return 0;
+}
+
+static const struct timer_ops arm_twd_timer_ops = {
+	.get_count = arm_twd_timer_get_count,
+};
+
+static const struct udevice_id arm_twd_timer_ids[] = {
+	{ .compatible = "arm,cortex-a9-twd-timer" },
+	{}
+};
+
+U_BOOT_DRIVER(arm_twd_timer) = {
+	.name = "arm_twd_timer",
+	.id = UCLASS_TIMER,
+	.of_match = arm_twd_timer_ids,
+	.priv_auto	= sizeof(struct arm_twd_timer_priv),
+	.probe = arm_twd_timer_probe,
+	.ops = &arm_twd_timer_ops,
+};