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authorPadmarao Begari <[email protected]>2026-06-23 20:38:22 +0530
committerMichal Simek <[email protected]>2026-07-08 08:55:51 +0200
commit1d24edabfed9d32be7e35a53946ae177d4b4121a (patch)
tree411b24027ece38c38119a2e672bf62928ffefae4 /drivers
parent7edbbfca632a97104b9bbe0ba6ba7accea395822 (diff)
soc: xilinx: zynqmp: Add TCG variant detection for ZU3TCG
The XCZU3TCG device shares IDCODE 0x04718093 with XCZU3TEG but has the GPU disable eFuse bit set (Consumer Grade, no GPU). Previously, the TEG detection branch appended "teg" unconditionally, causing U-Boot to report the device as zu3teg and failing bitstream ID checks for xczu3tcg bitstreams. Check EFUSE_GPU_DIS_MASK in the TEG branch to distinguish the two sub-variants, mirroring the existing EG/CG detection logic: - GPU disabled -> TCG family -> "zu3tcg" - GPU enabled -> TEG family -> "zu3teg" Fixes: fa2f0c97af96 ("soc: zynqmp: Add the IDcode for TEG variant") Signed-off-by: Padmarao Begari <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://patch.msgid.link/[email protected]
Diffstat (limited to 'drivers')
-rw-r--r--drivers/soc/soc_xilinx_zynqmp.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/soc/soc_xilinx_zynqmp.c b/drivers/soc/soc_xilinx_zynqmp.c
index 4abc73013eb..0e13e230914 100644
--- a/drivers/soc/soc_xilinx_zynqmp.c
+++ b/drivers/soc/soc_xilinx_zynqmp.c
@@ -358,7 +358,9 @@ static int soc_xilinx_zynqmp_detect_machine(struct udevice *dev, u32 idcode,
} else if (device->variants & ZYNQMP_VARIANT_DR_SE) {
strlcat(priv->machine, "dr_SE", sizeof(priv->machine));
} else if (device->variants & ZYNQMP_VARIANT_TEG) {
- strlcat(priv->machine, "teg", sizeof(priv->machine));
+ /* Devices with TEG variant might be TEG or TCG family */
+ strlcat(priv->machine, (idcode2 & EFUSE_GPU_DIS_MASK) ?
+ "tcg" : "teg", sizeof(priv->machine));
}
return 0;