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authorDinesh Maniyam <[email protected]>2025-02-27 00:18:25 +0800
committerMichael Trimarchi <[email protected]>2025-03-15 10:35:01 +0100
commit2b2745b18967e4ec04c04630744eb35b908546ee (patch)
treeccdfa11274696f6f681ddbca0cf6bd420e613838 /drivers
parent880c317230a8650f3b1fca3fa6ee16adce47545c (diff)
drivers: mtd: nand: cadence: Use bounce buffer
Enable nand to use bounce buffer. In bounce buffer, read/write buf will use cadence->buf which has been allocated using malloc. This will align the memory and avoid memory to be allocated in different addresses. Signed-off-by: Dinesh Maniyam <[email protected]>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mtd/nand/raw/cadence_nand.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/mtd/nand/raw/cadence_nand.c b/drivers/mtd/nand/raw/cadence_nand.c
index e571e5a6868..27aa7f97a45 100644
--- a/drivers/mtd/nand/raw/cadence_nand.c
+++ b/drivers/mtd/nand/raw/cadence_nand.c
@@ -980,7 +980,7 @@ static int cadence_nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
cadence_nand_prepare_data_size(mtd, TT_MAIN_OOB_AREA_EXT);
if (cadence_nand_dma_buf_ok(cadence, buf, mtd->writesize) &&
- cadence->caps2.data_control_supp) {
+ cadence->caps2.data_control_supp && !(chip->options & NAND_USE_BOUNCE_BUFFER)) {
u8 *oob;
if (oob_required)
@@ -1156,7 +1156,7 @@ static int cadence_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip,
* is supported then transfer data and oob directly.
*/
if (cadence_nand_dma_buf_ok(cadence, buf, mtd->writesize) &&
- cadence->caps2.data_control_supp) {
+ cadence->caps2.data_control_supp && !(chip->options & NAND_USE_BOUNCE_BUFFER)) {
u8 *oob;
if (oob_required)
@@ -1859,6 +1859,7 @@ static int cadence_nand_attach_chip(struct nand_chip *chip)
return ret;
}
+ chip->options |= NAND_USE_BOUNCE_BUFFER;
chip->bbt_options |= NAND_BBT_USE_FLASH;
chip->bbt_options |= NAND_BBT_NO_OOB;
chip->ecc.mode = NAND_ECC_HW_SYNDROME;