diff options
| author | P.V.Suresh <[email protected]> | 2010-12-04 10:37:23 +0530 |
|---|---|---|
| committer | Kumar Gala <[email protected]> | 2010-12-13 09:32:16 -0600 |
| commit | 2c1764efc2872fc944d0d580e911168c0a231f8c (patch) | |
| tree | 42bd74bd86e29cb699f42182821b64350d6e1be4 /drivers | |
| parent | 9fd84915a92058b775fcc8fad4ab4e59fe51cf17 (diff) | |
fsl_esdhc: Set the eSHDC DMACTL[SNOOP] bit after resetting the controller
eSDHC host controller reset results in clearing of snoop bit also.
This patch sets the SNOOP bit after the completion of host controller reset.
Without this patch mmc reads are not consistent.
Signed-off-by: P.V.Suresh <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mmc/fsl_esdhc.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index a368fe60db4..57cd4ee1f43 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -384,10 +384,6 @@ static int esdhc_init(struct mmc *mmc) int ret = 0; u8 card_absent; - /* Enable cache snooping */ - if (cfg && !cfg->no_snoop) - esdhc_write32(®s->scr, 0x00000040); - /* Reset the entire host controller */ esdhc_write32(®s->sysctl, SYSCTL_RSTA); @@ -395,6 +391,10 @@ static int esdhc_init(struct mmc *mmc) while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA) && --timeout) udelay(1000); + /* Enable cache snooping */ + if (cfg && !cfg->no_snoop) + esdhc_write32(®s->scr, 0x00000040); + esdhc_write32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN); /* Set the initial clock speed */ |