Merge branch '2020-01-22-master-imports'

- Re-add U8500 platform support
- Add bcm968360bg support
- Assorted Keymile fixes
- Other assorted bugfixes

10 files changed, 261 insertions, 4 deletions

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 1de6f5225e0..4e5a70780a9 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -55,7 +55,8 @@ config ALTERA_PIO
 
 config BCM6345_GPIO
 	bool "BCM6345 GPIO driver"
-	depends on DM_GPIO && (ARCH_BMIPS || ARCH_BCM6858 || ARCH_BCM63158)
+	depends on DM_GPIO && (ARCH_BMIPS || ARCH_BCM68360 || \
+			       ARCH_BCM6858 || ARCH_BCM63158)
 	help
 	  This driver supports the GPIO banks on BCM6345 SoCs.
 
diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig
index 5643939348c..667593405eb 100644
--- a/drivers/led/Kconfig
+++ b/drivers/led/Kconfig
@@ -30,7 +30,7 @@ config LED_BCM6358
 
 config LED_BCM6858
 	bool "LED Support for BCM6858"
-	depends on LED && (ARCH_BCM6858 || ARCH_BCM63158)
+	depends on LED && (ARCH_BCM68360 || ARCH_BCM6858 || ARCH_BCM63158)
 	help
 	  This option enables support for LEDs connected to the BCM6858
 	  HW has blinking capabilities and up to 32 LEDs can be controlled.
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 5de72fb46c0..7814d84ba01 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -78,6 +78,12 @@ config NAND_BRCMNAND_6368
 	help
 	  Enable support for broadcom nand driver on bcm6368.
 
+config NAND_BRCMNAND_68360
+       bool "Support Broadcom NAND controller on bcm68360"
+       depends on NAND_BRCMNAND && ARCH_BCM68360
+       help
+         Enable support for broadcom nand driver on bcm68360.
+
 config NAND_BRCMNAND_6838
        bool "Support Broadcom NAND controller on bcm6838"
        depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838
diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile
index 7e70b859dc1..5d9e7e3f3b5 100644
--- a/drivers/mtd/nand/raw/brcmnand/Makefile
+++ b/drivers/mtd/nand/raw/brcmnand/Makefile
@@ -2,6 +2,7 @@
 
 obj-$(CONFIG_NAND_BRCMNAND_6368) += bcm6368_nand.o
 obj-$(CONFIG_NAND_BRCMNAND_63158) += bcm63158_nand.o
+obj-$(CONFIG_NAND_BRCMNAND_68360) += bcm68360_nand.o
 obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o
 obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o
 obj-$(CONFIG_NAND_BRCMNAND) += brcmnand.o
diff --git a/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c
new file mode 100644
index 00000000000..0f1a28e4765
--- /dev/null
+++ b/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c
@@ -0,0 +1,123 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <common.h>
+#include <asm/io.h>
+#include <memalign.h>
+#include <nand.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <dm.h>
+
+#include "brcmnand.h"
+
+struct bcm68360_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+};
+
+#define BCM68360_NAND_INT		0x00
+#define BCM68360_NAND_STATUS_SHIFT	0
+#define BCM68360_NAND_STATUS_MASK	(0xfff << BCM68360_NAND_STATUS_SHIFT)
+
+#define BCM68360_NAND_INT_EN		0x04
+#define BCM68360_NAND_ENABLE_SHIFT	0
+#define BCM68360_NAND_ENABLE_MASK	(0xffff << BCM68360_NAND_ENABLE_SHIFT)
+
+enum {
+	BCM68360_NP_READ		= BIT(0),
+	BCM68360_BLOCK_ERASE	= BIT(1),
+	BCM68360_COPY_BACK	= BIT(2),
+	BCM68360_PAGE_PGM	= BIT(3),
+	BCM68360_CTRL_READY	= BIT(4),
+	BCM68360_DEV_RBPIN	= BIT(5),
+	BCM68360_ECC_ERR_UNC	= BIT(6),
+	BCM68360_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm68360_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm68360_nand_soc *priv =
+			container_of(soc, struct bcm68360_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM68360_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM68360_CTRL_READY << BCM68360_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM68360_NAND_STATUS_MASK;
+		val |= BCM68360_CTRL_READY << BCM68360_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm68360_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm68360_nand_soc *priv =
+			container_of(soc, struct bcm68360_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM68360_NAND_INT_EN;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM68360_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM68360_CTRL_READY << BCM68360_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM68360_CTRL_READY << BCM68360_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static int bcm68360_nand_probe(struct udevice *dev)
+{
+	struct udevice *pdev = dev;
+	struct bcm68360_nand_soc *priv = dev_get_priv(dev);
+	struct brcmnand_soc *soc;
+	struct resource res;
+
+	soc = &priv->soc;
+
+	dev_read_resource_byname(pdev, "nand-int-base", &res);
+	priv->base = devm_ioremap(dev, res.start, resource_size(&res));
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	soc->ctlrdy_ack = bcm68360_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm68360_nand_intc_set;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM68360_NAND_INT_EN);
+	brcmnand_writel(0, priv->base + BCM68360_NAND_INT);
+
+	return brcmnand_probe(pdev, soc);
+}
+
+static const struct udevice_id bcm68360_nand_dt_ids[] = {
+	{
+		.compatible = "brcm,nand-bcm68360",
+	},
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(bcm68360_nand) = {
+	.name = "bcm68360-nand",
+	.id = UCLASS_MTD,
+	.of_match = bcm68360_nand_dt_ids,
+	.probe = bcm68360_nand_probe,
+	.priv_auto_alloc_size = sizeof(struct bcm68360_nand_soc),
+};
+
+void board_nand_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(bcm68360_nand), &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize %s. (error %d)\n", dev->name,
+		       ret);
+}
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index fae2040af8e..73d1a69807e 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -84,7 +84,8 @@ config ATMEL_SPI
 
 config BCM63XX_HSSPI
 	bool "BCM63XX HSSPI driver"
-	depends on (ARCH_BMIPS || ARCH_BCM6858 || ARCH_BCM63158)
+	depends on (ARCH_BMIPS || ARCH_BCM68360 || \
+		    ARCH_BCM6858 || ARCH_BCM63158)
 	help
 	  Enable the BCM6328 HSSPI driver. This driver can be used to
 	  access the SPI NOR flash on platforms embedding this Broadcom
diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index 96cc49273f4..637024445c1 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -127,6 +127,15 @@ config X86_TSC_TIMER_EARLY_FREQ
 	  hardware ways, nor got from device tree at the time when device
 	  tree is not available yet.
 
+config NOMADIK_MTU_TIMER
+	bool "Nomadik MTU Timer"
+	depends on TIMER
+	help
+	  Enables support for the Nomadik Multi Timer Unit (MTU),
+	  used in ST-Ericsson Ux500 SoCs.
+	  The MTU provides 4 decrementing free-running timers.
+	  At the moment, only the first timer is used by the driver.
+
 config OMAP_TIMER
 	bool "Omap timer support"
 	depends on TIMER
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index fa35bea6c5b..c22ffebcdec 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_ATMEL_PIT_TIMER) += atmel_pit_timer.o
 obj-$(CONFIG_CADENCE_TTC_TIMER)	+= cadence-ttc.o
 obj-$(CONFIG_DESIGNWARE_APB_TIMER)	+= dw-apb-timer.o
 obj-$(CONFIG_MPC83XX_TIMER) += mpc83xx_timer.o
+obj-$(CONFIG_NOMADIK_MTU_TIMER)	+= nomadik-mtu-timer.o
 obj-$(CONFIG_OMAP_TIMER)	+= omap-timer.o
 obj-$(CONFIG_RENESAS_OSTM_TIMER) += ostm_timer.o
 obj-$(CONFIG_RISCV_TIMER) += riscv_timer.o
diff --git a/drivers/timer/nomadik-mtu-timer.c b/drivers/timer/nomadik-mtu-timer.c
new file mode 100644
index 00000000000..8648f1f1df9
--- /dev/null
+++ b/drivers/timer/nomadik-mtu-timer.c
@@ -0,0 +1,114 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2019 Stephan Gerhold <[email protected]>
+ *
+ * Based on arch/arm/cpu/armv7/u8500/timer.c:
+ * Copyright (C) 2010 Linaro Limited
+ * John Rigby <[email protected]>
+ *
+ * Based on Linux kernel source and internal ST-Ericsson U-Boot source:
+ * Copyright (C) 2009 Alessandro Rubini
+ * Copyright (C) 2010 ST-Ericsson
+ * Copyright (C) 2010 Linus Walleij for ST-Ericsson
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <timer.h>
+#include <asm/io.h>
+
+#define MTU_NUM_TIMERS		4
+
+/* The timers */
+struct nomadik_mtu_timer_regs {
+	u32 lr;		/* Load register */
+	u32 cv;		/* Current value */
+	u32 cr;		/* Control register */
+	u32 bglr;	/* Background load register */
+};
+
+/* The MTU that contains the timers */
+struct nomadik_mtu_regs {
+	u32 imsc;	/* Interrupt mask set/clear */
+	u32 ris;	/* Raw interrupt status */
+	u32 mis;	/* Masked interrupt status */
+	u32 icr;	/* Interrupt clear register */
+
+	struct nomadik_mtu_timer_regs timers[MTU_NUM_TIMERS];
+};
+
+/* Bits for the control register */
+#define MTU_CR_ONESHOT		BIT(0)	/* if 0 = wraps reloading from BGLR */
+#define MTU_CR_32BITS		BIT(1)	/* if 0 = 16-bit counter */
+
+#define MTU_CR_PRESCALE_SHIFT	2
+#define MTU_CR_PRESCALE_1	(0 << MTU_CR_PRESCALE_SHIFT)
+#define MTU_CR_PRESCALE_16	(1 << MTU_CR_PRESCALE_SHIFT)
+#define MTU_CR_PRESCALE_256	(2 << MTU_CR_PRESCALE_SHIFT)
+
+#define MTU_CR_PERIODIC		BIT(6)	/* if 0 = free-running */
+#define MTU_CR_ENABLE		BIT(7)
+
+struct nomadik_mtu_priv {
+	struct nomadik_mtu_timer_regs *timer;
+};
+
+static int nomadik_mtu_get_count(struct udevice *dev, u64 *count)
+{
+	struct nomadik_mtu_priv *priv = dev_get_priv(dev);
+
+	/* Decrementing counter: invert the value */
+	*count = timer_conv_64(~readl(&priv->timer->cv));
+
+	return 0;
+}
+
+static int nomadik_mtu_probe(struct udevice *dev)
+{
+	struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+	struct nomadik_mtu_priv *priv = dev_get_priv(dev);
+	struct nomadik_mtu_regs *mtu;
+	fdt_addr_t addr;
+	u32 prescale;
+
+	addr = dev_read_addr(dev);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	mtu = (struct nomadik_mtu_regs *)addr;
+	priv->timer = mtu->timers; /* Use first timer */
+
+	if (!uc_priv->clock_rate)
+		return -EINVAL;
+
+	/* Use divide-by-16 counter if tick rate is more than 32 MHz */
+	if (uc_priv->clock_rate > 32000000) {
+		uc_priv->clock_rate /= 16;
+		prescale = MTU_CR_PRESCALE_16;
+	} else {
+		prescale = MTU_CR_PRESCALE_1;
+	}
+
+	/* Configure a free-running, auto-wrap counter with selected prescale */
+	writel(MTU_CR_ENABLE | prescale | MTU_CR_32BITS, &priv->timer->cr);
+
+	return 0;
+}
+
+static const struct timer_ops nomadik_mtu_ops = {
+	.get_count = nomadik_mtu_get_count,
+};
+
+static const struct udevice_id nomadik_mtu_ids[] = {
+	{ .compatible = "st,nomadik-mtu" },
+	{}
+};
+
+U_BOOT_DRIVER(nomadik_mtu) = {
+	.name = "nomadik_mtu",
+	.id = UCLASS_TIMER,
+	.of_match = nomadik_mtu_ids,
+	.priv_auto_alloc_size = sizeof(struct nomadik_mtu_priv),
+	.probe = nomadik_mtu_probe,
+	.ops = &nomadik_mtu_ops,
+};
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 8c16d69d333..2b8064dfae0 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -85,7 +85,8 @@ config WDT_AT91
 
 config WDT_BCM6345
 	bool "BCM6345 watchdog timer support"
-	depends on WDT && (ARCH_BMIPS || ARCH_BCM6858 || ARCH_BCM63158)
+	depends on WDT && (ARCH_BMIPS || ARCH_BCM68360 || \
+			   ARCH_BCM6858 || ARCH_BCM63158)
 	help
 	  Select this to enable watchdog timer for BCM6345 SoCs.
 	  The watchdog timer is stopped when initialized.