Merge https://source.denx.de/u-boot/custodians/u-boot-marvell

- fdt_support: Add fdt_for_each_node_by_compatible() helper macro
  (Marek)
- turris_omnia: Fixup SATA or PCIe nodes at runtime in DT blob (Pali)
- pci_mvebu: Add support for Kirkwood PCIe controllers (Pali)
- SPL: More verifications for kwbimage in SPL (Pali)
- mvebu: Remove comphy_update_map() (Pali)
- Minor misc stuff

12 files changed, 69 insertions, 67 deletions

diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c
index 02bc3f86cae..59df57a9acc 100644
--- a/drivers/misc/fsl_portals.c
+++ b/drivers/misc/fsl_portals.c
@@ -208,8 +208,7 @@ void fdt_fixup_qportals(void *blob)
 			     maj, min, ip_cfg) + 1;
 	compat_len += sprintf(compat + compat_len, "fsl,qman-portal") + 1;
 
-	off = fdt_node_offset_by_compatible(blob, -1, "fsl,qman-portal");
-	while (off != -FDT_ERR_NOTFOUND) {
+	fdt_for_each_node_by_compatible(off, blob, -1, "fsl,qman-portal") {
 #if defined(CONFIG_PPC) || defined(CONFIG_ARCH_LS1043A) || \
 defined(CONFIG_ARCH_LS1046A)
 #ifdef CONFIG_FSL_CORENET
@@ -295,9 +294,6 @@ err:
 			       fdt_strerror(err));
 			return;
 		}
-
-		off = fdt_node_offset_by_compatible(blob, off,
-						    "fsl,qman-portal");
 	}
 }
 
diff --git a/drivers/net/fm/fdt.c b/drivers/net/fm/fdt.c
index 3855d7d58fa..9828753412b 100644
--- a/drivers/net/fm/fdt.c
+++ b/drivers/net/fm/fdt.c
@@ -115,8 +115,7 @@ void fdt_fixup_fman_firmware(void *blob)
 	}
 
 	/* Find all other Fman nodes and point them to the firmware node. */
-	while ((fmnode = fdt_node_offset_by_compatible(blob, fmnode,
-		"fsl,fman")) > 0) {
+	fdt_for_each_node_by_compatible(fmnode, blob, fmnode, "fsl,fman") {
 		rc = fdt_setprop_cell(blob, fmnode, "fsl,firmware-phandle",
 				      phandle);
 		if (rc < 0) {
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 630d6e6cc5e..69141344c86 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -262,13 +262,13 @@ config PCIE_IPROC
 	  Say Y here if you want to enable Broadcom iProc PCIe controller,
 
 config PCI_MVEBU
-	bool "Enable Armada XP/38x PCIe driver"
-	depends on ARCH_MVEBU
+	bool "Enable Kirkwood / Armada 370/XP/375/38x PCIe driver"
+	depends on (ARCH_KIRKWOOD || ARCH_MVEBU)
 	select MISC
 	select DM_RESET
 	help
 	  Say Y here if you want to enable PCIe controller support on
-	  Armada XP/38x SoCs.
+	  Kirkwood and Armada 370/XP/375/38x SoCs.
 
 config PCIE_DW_COMMON
 	bool
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index b3ea034a284..d99a99bae94 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -498,6 +498,13 @@ static int mvebu_pcie_probe(struct udevice *dev)
 	mvebu_pcie_set_local_bus_nr(pcie, 0);
 	mvebu_pcie_set_local_dev_nr(pcie, 1);
 
+	/*
+	 * Kirkwood arch code already maps mbus windows for PCIe IO and MEM.
+	 * So skip calling mvebu_mbus_add_window_by_id() function as it would
+	 * fail on error "conflicts with another window" which means conflict
+	 * with existing PCIe window mappings.
+	 */
+#ifndef CONFIG_ARCH_KIRKWOOD
 	if (resource_size(&pcie->mem) &&
 	    mvebu_mbus_add_window_by_id(pcie->mem_target, pcie->mem_attr,
 					(phys_addr_t)pcie->mem.start,
@@ -519,6 +526,7 @@ static int mvebu_pcie_probe(struct udevice *dev)
 		pcie->io.start = 0;
 		pcie->io.end = -1;
 	}
+#endif
 
 	/* Setup windows and configure host bridge */
 	mvebu_pcie_setup_wins(pcie);
@@ -725,10 +733,17 @@ static int mvebu_pcie_bind(struct udevice *parent)
 	}
 	ports_count = 0;
 
+#ifdef CONFIG_ARCH_KIRKWOOD
+	mem.start = KW_DEFADR_PCI_MEM;
+	mem.end = KW_DEFADR_PCI_MEM + KW_DEFADR_PCI_MEM_SIZE - 1;
+	io.start = KW_DEFADR_PCI_IO;
+	io.end = KW_DEFADR_PCI_IO + KW_DEFADR_PCI_IO_SIZE - 1;
+#else
 	mem.start = MBUS_PCI_MEM_BASE;
 	mem.end = MBUS_PCI_MEM_BASE + MBUS_PCI_MEM_SIZE - 1;
 	io.start = MBUS_PCI_IO_BASE;
 	io.end = MBUS_PCI_IO_BASE + MBUS_PCI_IO_SIZE - 1;
+#endif
 
 	/* First phase: Fill mvebu_pcie struct for each port */
 	ofnode_for_each_subnode(subnode, dev_ofnode(parent)) {
@@ -809,6 +824,7 @@ static int mvebu_pcie_bind(struct udevice *parent)
 static const struct udevice_id mvebu_pcie_ids[] = {
 	{ .compatible = "marvell,armada-xp-pcie" },
 	{ .compatible = "marvell,armada-370-pcie" },
+	{ .compatible = "marvell,kirkwood-pcie" },
 	{ }
 };
 
diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c
index faccf6c141f..095874a9276 100644
--- a/drivers/pci/pcie_layerscape_fixup_common.c
+++ b/drivers/pci/pcie_layerscape_fixup_common.c
@@ -48,8 +48,7 @@ static int lx2_board_fix_fdt(void *fdt)
 	const fdt32_t *prop;
 	u32 ob_wins, ib_wins;
 
-	off = fdt_node_offset_by_compatible(fdt, -1, "fsl,lx2160a-pcie");
-	while (off != -FDT_ERR_NOTFOUND) {
+	fdt_for_each_node_by_compatible(off, fdt, -1, "fsl,lx2160a-pcie") {
 		fdt_setprop(fdt, off, "compatible", "fsl,ls2088a-pcie",
 			    strlen("fsl,ls2088a-pcie") + 1);
 
@@ -89,14 +88,10 @@ static int lx2_board_fix_fdt(void *fdt)
 		fdt_setprop(fdt, off, "reg-names", reg_names, names_len);
 		fdt_delprop(fdt, off, "apio-wins");
 		fdt_delprop(fdt, off, "ppio-wins");
-		off = fdt_node_offset_by_compatible(fdt, off,
-						    "fsl,lx2160a-pcie");
 	}
 
 	/* Fixup PCIe EP nodes */
-	off = -1;
-	off = fdt_node_offset_by_compatible(fdt, off, "fsl,lx2160a-pcie-ep");
-	while (off != -FDT_ERR_NOTFOUND) {
+	fdt_for_each_node_by_compatible(off, fdt, -1, "fsl,lx2160a-pcie-ep") {
 		fdt_setprop_string(fdt, off, "compatible",
 				   "fsl,lx2160ar2-pcie-ep");
 		prop = fdt_getprop(fdt, off, "apio-wins", NULL);
@@ -113,9 +108,6 @@ static int lx2_board_fix_fdt(void *fdt)
 		fdt_setprop_u32(fdt, off, "num-ib-windows", ib_wins);
 		fdt_setprop_u32(fdt, off, "num-ob-windows", ob_wins);
 		fdt_delprop(fdt, off, "apio-wins");
-
-		off = fdt_node_offset_by_compatible(fdt, off,
-						    "fsl,lx2160a-pcie-ep");
 	}
 
 	return 0;
diff --git a/drivers/phy/marvell/comphy_a3700.c b/drivers/phy/marvell/comphy_a3700.c
index 41043535554..7cde59b8e28 100644
--- a/drivers/phy/marvell/comphy_a3700.c
+++ b/drivers/phy/marvell/comphy_a3700.c
@@ -4,7 +4,7 @@
  */
 
 #include <common.h>
-#include <fdtdec.h>
+#include <fdt_support.h>
 #include <log.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
@@ -985,12 +985,12 @@ void comphy_dedicated_phys_init(void)
 
 static int find_available_node_by_compatible(int offset, const char *compatible)
 {
-	do {
-		offset = fdt_node_offset_by_compatible(gd->fdt_blob, offset,
-						       compatible);
-	} while (offset > 0 && !fdtdec_get_is_enabled(gd->fdt_blob, offset));
+	fdt_for_each_node_by_compatible(offset, gd->fdt_blob, offset,
+					compatible)
+		if (fdtdec_get_is_enabled(gd->fdt_blob, offset))
+			return offset;
 
-	return offset;
+	return -1;
 }
 
 static bool comphy_a3700_find_lane(const int nodes[3], int node,
diff --git a/drivers/phy/marvell/comphy_core.c b/drivers/phy/marvell/comphy_core.c
index 233a973035b..5bb994fe42a 100644
--- a/drivers/phy/marvell/comphy_core.c
+++ b/drivers/phy/marvell/comphy_core.c
@@ -79,11 +79,6 @@ int comphy_rx_training(struct udevice *dev, u32 lane)
 	return 0;
 }
 
-__weak int comphy_update_map(struct comphy_map *serdes_map, int count)
-{
-	return 0;
-}
-
 static int comphy_probe(struct udevice *dev)
 {
 	int node = dev_of_offset(dev);
@@ -126,10 +121,6 @@ static int comphy_probe(struct udevice *dev)
 	if (res < 0)
 		return res;
 
-	res = comphy_update_map(chip_cfg->comphy_map_data, chip_cfg->comphy_lanes_count);
-	if (res < 0)
-		return res;
-
 	/* Save CP index for MultiCP devices (A8K) */
 	chip_cfg->cp_index = current_idx++;
 	/* PHY power UP sequence */
diff --git a/drivers/phy/marvell/comphy_core.h b/drivers/phy/marvell/comphy_core.h
index d573776c05a..f3d04939387 100644
--- a/drivers/phy/marvell/comphy_core.h
+++ b/drivers/phy/marvell/comphy_core.h
@@ -8,6 +8,7 @@
 
 #include <fdtdec.h>
 #include <mvebu/comphy.h>
+#include <dt-bindings/comphy/comphy_data.h>
 
 #if defined(DEBUG)
 #define debug_enter()	printf("----> Enter %s\n", __func__);
@@ -20,6 +21,14 @@
 #define MAX_LANE_OPTIONS			10
 #define MAX_UTMI_PHY_COUNT			6
 
+struct comphy_map {
+	u32 type;
+	u32 speed;
+	u32 invert;
+	bool clk_src;
+	bool end_point;
+};
+
 struct comphy_mux_options {
 	u32 type;
 	u32 mux_value;
diff --git a/drivers/ram/octeon/octeon3_lmc.c b/drivers/ram/octeon/octeon3_lmc.c
index 349abc179fa..eaef0fa5c12 100644
--- a/drivers/ram/octeon/octeon3_lmc.c
+++ b/drivers/ram/octeon/octeon3_lmc.c
@@ -2050,7 +2050,7 @@ static int compute_vref_val(struct ddr_priv *priv, int if_num, int rankx,
 		lmc_control.u64 = lmc_rd(priv, CVMX_LMCX_CONTROL(if_num));
 
 		/*
-		 *  New computed vref = existing computed vref – X
+		 *  New computed vref = existing computed vref - X
 		 *
 		 * The value of X is depending on different conditions.
 		 * Both #122 and #139 are 2Rx4 RDIMM, while #124 is stacked
@@ -2058,7 +2058,7 @@ static int compute_vref_val(struct ddr_priv *priv, int if_num, int rankx,
 		 *
 		 * 1. Stacked Die: 2Rx4
 		 * 1-slot: offset = 7. i, e New computed vref = existing
-		 * computed vref – 7
+		 * computed vref - 7
 		 * 2-slot: offset = 6
 		 *
 		 * 2. Regular: 2Rx4
@@ -9941,11 +9941,11 @@ static int test_dram_byte_hw(struct ddr_priv *priv, int if_num, u64 p,
 	 * NOTE: this step done in the calling routine(s)...
 	 * 3) Setup GENERAL_PURPOSE[0-2] registers with the data pattern
 	 * of choice.
-	 * a. GENERAL_PURPOSE0[DATA<63:0>] – sets the initial lower
+	 * a. GENERAL_PURPOSE0[DATA<63:0>] - sets the initial lower
 	 * (rising edge) 64 bits of data.
-	 * b. GENERAL_PURPOSE1[DATA<63:0>] – sets the initial upper
+	 * b. GENERAL_PURPOSE1[DATA<63:0>] - sets the initial upper
 	 * (falling edge) 64 bits of data.
-	 * c. GENERAL_PURPOSE2[DATA<15:0>] – sets the initial lower
+	 * c. GENERAL_PURPOSE2[DATA<15:0>] - sets the initial lower
 	 * (rising edge <7:0>) and upper (falling edge <15:8>) ECC data.
 	 */
 
@@ -9980,8 +9980,8 @@ static int test_dram_byte_hw(struct ddr_priv *priv, int if_num, u64 p,
 
 	/*
 	 * 7) Set PHY_CTL[PHY_RESET] = 1 (LMC automatically clears this as
-	 * it’s a one-shot operation). This is to get into the habit of
-	 * resetting PHY’s SILO to the original 0 location.
+	 * it's a one-shot operation). This is to get into the habit of
+	 * resetting PHY's SILO to the original 0 location.
 	 */
 	phy_ctl.u64 = lmc_rd(priv, CVMX_LMCX_PHY_CTL(if_num));
 	phy_ctl.s.phy_reset = 1;
@@ -10013,9 +10013,9 @@ static int test_dram_byte_hw(struct ddr_priv *priv, int if_num, u64 p,
 		 * a. COL, ROW, BA, BG, PRANK points to the starting point
 		 * of the address.
 		 * You can just set them to all 0.
-		 * b. RW_TRAIN – set this to 1.
-		 * c. TCCD_L – set this to 0.
-		 * d. READ_CMD_COUNT – instruct the sequence to the how many
+		 * b. RW_TRAIN - set this to 1.
+		 * c. TCCD_L - set this to 0.
+		 * d. READ_CMD_COUNT - instruct the sequence to the how many
 		 * writes/reads.
 		 * It is 5 bits field, so set to 31 of maximum # of r/w.
 		 */
@@ -10063,9 +10063,9 @@ static int test_dram_byte_hw(struct ddr_priv *priv, int if_num, u64 p,
 
 			/*
 			 * 6) Read MPR_DATA0 and MPR_DATA1 for results.
-			 * a. MPR_DATA0[MPR_DATA<63:0>] – comparison results
+			 * a. MPR_DATA0[MPR_DATA<63:0>] - comparison results
 			 *    for DQ63:DQ0. (1 means MATCH, 0 means FAIL).
-			 * b. MPR_DATA1[MPR_DATA<7:0>] – comparison results
+			 * b. MPR_DATA1[MPR_DATA<7:0>] - comparison results
 			 *    for ECC bit7:0.
 			 */
 			mpr_data0 = lmc_rd(priv, CVMX_LMCX_MPR_DATA0(if_num));
@@ -10073,8 +10073,8 @@ static int test_dram_byte_hw(struct ddr_priv *priv, int if_num, u64 p,
 
 			/*
 			 * 7) Set PHY_CTL[PHY_RESET] = 1 (LMC automatically
-			 * clears this as it’s a one-shot operation).
-			 * This is to get into the habit of resetting PHY’s
+			 * clears this as it's a one-shot operation).
+			 * This is to get into the habit of resetting PHY's
 			 * SILO to the original 0 location.
 			 */
 			phy_ctl.u64 = lmc_rd(priv, CVMX_LMCX_PHY_CTL(if_num));
@@ -10163,11 +10163,11 @@ static void setup_hw_pattern(struct ddr_priv *priv, int lmc,
 	/*
 	 * 3) Setup GENERAL_PURPOSE[0-2] registers with the data pattern
 	 * of choice.
-	 * a. GENERAL_PURPOSE0[DATA<63:0>] – sets the initial lower
+	 * a. GENERAL_PURPOSE0[DATA<63:0>] - sets the initial lower
 	 *    (rising edge) 64 bits of data.
-	 * b. GENERAL_PURPOSE1[DATA<63:0>] – sets the initial upper
+	 * b. GENERAL_PURPOSE1[DATA<63:0>] - sets the initial upper
 	 *    (falling edge) 64 bits of data.
-	 * c. GENERAL_PURPOSE2[DATA<15:0>] – sets the initial lower
+	 * c. GENERAL_PURPOSE2[DATA<15:0>] - sets the initial lower
 	 *    (rising edge <7:0>) and upper
 	 * (falling edge <15:8>) ECC data.
 	 */
diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c
index e48aa2f90df..0fa7230b992 100644
--- a/drivers/usb/gadget/f_sdp.c
+++ b/drivers/usb/gadget/f_sdp.c
@@ -773,7 +773,8 @@ static ulong search_container_header(ulong p, int size)
 }
 #endif
 
-static int sdp_handle_in_ep(struct spl_image_info *spl_image)
+static int sdp_handle_in_ep(struct spl_image_info *spl_image,
+			    struct spl_boot_device *bootdev)
 {
 	u8 *data = sdp_func->in_req->buf;
 	u32 status;
@@ -862,7 +863,8 @@ static int sdp_handle_in_ep(struct spl_image_info *spl_image)
 
 			/* In SPL, allow jumps to U-Boot images */
 			struct spl_image_info spl_image = {};
-			spl_parse_image_header(&spl_image, header);
+			struct spl_boot_device bootdev = {};
+			spl_parse_image_header(&spl_image, &bootdev, header);
 			jump_to_image_no_args(&spl_image);
 #else
 			/* In U-Boot, allow jumps to scripts */
@@ -910,7 +912,8 @@ static void sdp_handle_out_ep(void)
 #ifndef CONFIG_SPL_BUILD
 int sdp_handle(int controller_index)
 #else
-int spl_sdp_handle(int controller_index, struct spl_image_info *spl_image)
+int spl_sdp_handle(int controller_index, struct spl_image_info *spl_image,
+		   struct spl_boot_device *bootdev)
 #endif
 {
 	int flag = 0;
@@ -928,9 +931,9 @@ int spl_sdp_handle(int controller_index, struct spl_image_info *spl_image)
 		usb_gadget_handle_interrupts(controller_index);
 
 #ifdef CONFIG_SPL_BUILD
-		flag = sdp_handle_in_ep(spl_image);
+		flag = sdp_handle_in_ep(spl_image, bootdev);
 #else
-		flag = sdp_handle_in_ep(NULL);
+		flag = sdp_handle_in_ep(NULL, NULL);
 #endif
 		if (sdp_func->ep_int_enable)
 			sdp_handle_out_ep();
diff --git a/drivers/video/meson/simplefb_common.c b/drivers/video/meson/simplefb_common.c
index 81782326d46..c8b5af501de 100644
--- a/drivers/video/meson/simplefb_common.c
+++ b/drivers/video/meson/simplefb_common.c
@@ -7,22 +7,19 @@
  * (C) Copyright 2017 Icenowy Zheng <[email protected]>
  */
 
-#include <fdtdec.h>
+#include <fdt_support.h>
 
 int meson_simplefb_fdt_match(void *blob, const char *pipeline)
 {
 	int offset, ret;
 
 	/* Find a prefilled simpefb node, matching out pipeline config */
-	offset = fdt_node_offset_by_compatible(blob, -1,
-					       "amlogic,simple-framebuffer");
-	while (offset >= 0) {
+	fdt_for_each_node_by_compatible(offset, blob, -1,
+					"amlogic,simple-framebuffer") {
 		ret = fdt_stringlist_search(blob, offset, "amlogic,pipeline",
 					    pipeline);
 		if (ret == 0)
 			break;
-		offset = fdt_node_offset_by_compatible(blob, offset,
-						"amlogic,simple-framebuffer");
 	}
 
 	return offset;
diff --git a/drivers/video/sunxi/simplefb_common.c b/drivers/video/sunxi/simplefb_common.c
index df6501e4c3f..ce0dc8f171b 100644
--- a/drivers/video/sunxi/simplefb_common.c
+++ b/drivers/video/sunxi/simplefb_common.c
@@ -7,7 +7,7 @@
  * (C) Copyright 2017 Icenowy Zheng <[email protected]>
  */
 
-#include <fdtdec.h>
+#include <fdt_support.h>
 
 int sunxi_simplefb_fdt_match(void *blob, const char *pipeline)
 {
@@ -16,13 +16,12 @@ int sunxi_simplefb_fdt_match(void *blob, const char *pipeline)
 	/* Find a prefilled simpefb node, matching out pipeline config */
 	offset = fdt_node_offset_by_compatible(blob, -1,
 					       "allwinner,simple-framebuffer");
-	while (offset >= 0) {
+	fdt_for_each_node_by_compatible(offset, blob, -1,
+					"allwinner,simple-framebuffer") {
 		ret = fdt_stringlist_search(blob, offset, "allwinner,pipeline",
 					    pipeline);
 		if (ret == 0)
 			break;
-		offset = fdt_node_offset_by_compatible(blob, offset,
-						"allwinner,simple-framebuffer");
 	}
 
 	return offset;