diff options
| author | Tom Rini <[email protected]> | 2025-02-24 17:15:14 -0600 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2025-02-24 17:15:14 -0600 |
| commit | 3ecda19009ebbe46a64b0629f8b64173c7a551c0 (patch) | |
| tree | ad8bc5289901745c546cafaa3a7cab4577c298c3 /drivers | |
| parent | 523a56cc54637a0c04a1e87c262599faf26d7d69 (diff) | |
| parent | dc0ee458f1afae4cb5c8a7b2c875bb24ffdf71ca (diff) | |
Merge tag 'v2025.04-rc3' into next
Prepare v2025.04-rc3
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpio/gpio-uclass.c | 20 | ||||
| -rw-r--r-- | drivers/led/led-uclass.c | 4 | ||||
| -rw-r--r-- | drivers/mmc/mmc.c | 2 | ||||
| -rw-r--r-- | drivers/net/dwc_eth_qos_rockchip.c | 14 | ||||
| -rw-r--r-- | drivers/pinctrl/rockchip/pinctrl-rk3328.c | 59 | ||||
| -rw-r--r-- | drivers/pinctrl/tegra/pinctrl-tegra20.c | 4 | ||||
| -rw-r--r-- | drivers/power/pmic/max77663.c | 9 | ||||
| -rw-r--r-- | drivers/power/pmic/palmas.c | 5 | ||||
| -rw-r--r-- | drivers/power/regulator/tps65941_regulator.c | 16 | ||||
| -rw-r--r-- | drivers/tpm/tpm2_tis_mmio.c | 2 | ||||
| -rw-r--r-- | drivers/usb/dwc3/Kconfig | 8 | ||||
| -rw-r--r-- | drivers/usb/dwc3/Makefile | 1 | ||||
| -rw-r--r-- | drivers/usb/dwc3/dwc3-generic-sti.c | 134 | ||||
| -rw-r--r-- | drivers/usb/dwc3/dwc3-generic.c | 20 | ||||
| -rw-r--r-- | drivers/usb/gadget/f_mass_storage.c | 1 | ||||
| -rw-r--r-- | drivers/usb/gadget/g_dnl.c | 3 | ||||
| -rw-r--r-- | drivers/usb/host/Kconfig | 9 | ||||
| -rw-r--r-- | drivers/usb/host/Makefile | 1 | ||||
| -rw-r--r-- | drivers/usb/host/dwc3-sti-glue.c | 253 |
19 files changed, 241 insertions, 324 deletions
diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c index da929c33447..3d9f8b32b8d 100644 --- a/drivers/gpio/gpio-uclass.c +++ b/drivers/gpio/gpio-uclass.c @@ -1145,29 +1145,9 @@ static int gpio_request_tail(int ret, const char *nodename, ret = uclass_get_device_by_ofnode(UCLASS_GPIO, args->node, &desc->dev); if (ret) { -#if CONFIG_IS_ENABLED(MAX77663_GPIO) || CONFIG_IS_ENABLED(PALMAS_GPIO) - struct udevice *pmic; - ret = uclass_get_device_by_ofnode(UCLASS_PMIC, args->node, - &pmic); - if (ret) { - log_debug("%s: PMIC device get failed, err %d\n", - __func__, ret); - goto err; - } - - device_foreach_child(desc->dev, pmic) { - if (device_get_uclass_id(desc->dev) == UCLASS_GPIO) - break; - } - - /* if loop exits without GPIO device return error */ - if (device_get_uclass_id(desc->dev) != UCLASS_GPIO) - goto err; -#else debug("%s: uclass_get_device_by_ofnode failed\n", __func__); goto err; -#endif } } ret = gpio_find_and_xlate(desc, args); diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c index 27ef890ed0a..22f61d12d38 100644 --- a/drivers/led/led-uclass.c +++ b/drivers/led/led-uclass.c @@ -273,6 +273,10 @@ static const char *led_get_function_name(struct udevice *dev) /* Now try to detect function label name */ func = dev_read_string(dev, "function"); cp = dev_read_u32(dev, "color", &color); + // prevent coverity scan error CID 541279: (TAINTED_SCALAR) + if (color < LED_COLOR_ID_WHITE || color >= LED_COLOR_ID_MAX) + cp = -EINVAL; + if (cp == 0 || func) { ret = dev_read_u32(dev, "function-enumerator", &enumerator); if (!ret) { diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 799586891af..31a72366206 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -2376,7 +2376,7 @@ static int mmc_startup_v4(struct mmc *mmc) | ext_csd[EXT_CSD_SEC_CNT + 2] << 16 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24; capacity *= MMC_MAX_BLOCK_LEN; - if ((capacity >> 20) > 2 * 1024) + if (mmc->high_capacity) mmc->capacity_user = capacity; } diff --git a/drivers/net/dwc_eth_qos_rockchip.c b/drivers/net/dwc_eth_qos_rockchip.c index 9fc8c686b88..f3a0f63003e 100644 --- a/drivers/net/dwc_eth_qos_rockchip.c +++ b/drivers/net/dwc_eth_qos_rockchip.c @@ -46,6 +46,10 @@ struct rockchip_platform_data { #define GRF_BIT(nr) (BIT(nr) | BIT((nr) + 16)) #define GRF_CLR_BIT(nr) (BIT((nr) + 16)) +#define DELAY_ENABLE(soc, tx, rx) \ + (((tx) ? soc##_GMAC_TXCLK_DLY_ENABLE : soc##_GMAC_TXCLK_DLY_DISABLE) | \ + ((rx) ? soc##_GMAC_RXCLK_DLY_ENABLE : soc##_GMAC_RXCLK_DLY_DISABLE)) + #define RK3568_GRF_GMAC0_CON0 0x0380 #define RK3568_GRF_GMAC0_CON1 0x0384 #define RK3568_GRF_GMAC1_CON0 0x0388 @@ -85,8 +89,7 @@ static int rk3568_set_to_rgmii(struct udevice *dev, regmap_write(data->grf, con1, RK3568_GMAC_PHY_INTF_SEL_RGMII | - RK3568_GMAC_RXCLK_DLY_ENABLE | - RK3568_GMAC_TXCLK_DLY_ENABLE); + DELAY_ENABLE(RK3568, tx_delay, rx_delay)); return 0; } @@ -131,6 +134,10 @@ static int rk3568_set_gmac_speed(struct udevice *dev) return 0; } +#define RK3588_DELAY_ENABLE(id, tx, rx) \ + (((tx) ? RK3588_GMAC_TXCLK_DLY_ENABLE(id) : RK3588_GMAC_TXCLK_DLY_DISABLE(id)) | \ + ((rx) ? RK3588_GMAC_RXCLK_DLY_ENABLE(id) : RK3588_GMAC_RXCLK_DLY_DISABLE(id))) + /* sys_grf */ #define RK3588_GRF_GMAC_CON7 0x031c #define RK3588_GRF_GMAC_CON8 0x0320 @@ -189,8 +196,7 @@ static int rk3588_set_to_rgmii(struct udevice *dev, RK3588_GMAC_CLK_RGMII_MODE(id)); regmap_write(data->grf, RK3588_GRF_GMAC_CON7, - RK3588_GMAC_RXCLK_DLY_ENABLE(id) | - RK3588_GMAC_TXCLK_DLY_ENABLE(id)); + RK3588_DELAY_ENABLE(id, tx_delay, rx_delay)); regmap_write(data->grf, offset_con, RK3588_GMAC_CLK_RX_DL_CFG(rx_delay) | diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c b/drivers/pinctrl/rockchip/pinctrl-rk3328.c index 47c2e923a1b..dd0dc2eff27 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3328.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c @@ -14,23 +14,68 @@ static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = { { - .num = 2, - .pin = 12, - .reg = 0x24, - .bit = 8, - .mask = 0x3 - }, { + /* gpio2_b7_sel */ .num = 2, .pin = 15, .reg = 0x28, .bit = 0, .mask = 0x7 }, { + /* gpio2_c7_sel */ .num = 2, .pin = 23, .reg = 0x30, .bit = 14, .mask = 0x3 + }, { + /* gpio3_b1_sel */ + .num = 3, + .pin = 9, + .reg = 0x44, + .bit = 2, + .mask = 0x3 + }, { + /* gpio3_b2_sel */ + .num = 3, + .pin = 10, + .reg = 0x44, + .bit = 4, + .mask = 0x3 + }, { + /* gpio3_b3_sel */ + .num = 3, + .pin = 11, + .reg = 0x44, + .bit = 6, + .mask = 0x3 + }, { + /* gpio3_b4_sel */ + .num = 3, + .pin = 12, + .reg = 0x44, + .bit = 8, + .mask = 0x3 + }, { + /* gpio3_b5_sel */ + .num = 3, + .pin = 13, + .reg = 0x44, + .bit = 10, + .mask = 0x3 + }, { + /* gpio3_b6_sel */ + .num = 3, + .pin = 14, + .reg = 0x44, + .bit = 12, + .mask = 0x3 + }, { + /* gpio3_b7_sel */ + .num = 3, + .pin = 15, + .reg = 0x44, + .bit = 14, + .mask = 0x3 }, }; @@ -275,7 +320,7 @@ static struct rockchip_pin_bank rk3328_pin_banks[] = { PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0), PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0), PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, - IOMUX_WIDTH_3BIT, + IOMUX_8WIDTH_2BIT, IOMUX_WIDTH_3BIT, 0), PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", diff --git a/drivers/pinctrl/tegra/pinctrl-tegra20.c b/drivers/pinctrl/tegra/pinctrl-tegra20.c index d5171b8be23..d59b3ec7b5d 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra20.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra20.c @@ -97,9 +97,9 @@ static int tegra_pinctrl_set_state(struct udevice *dev, struct udevice *config) * then actual pins setup (with node name prefix * conf_*) and then drive setup. */ - if (!strncmp(child->name, "conf_", 5)) + if (!strncmp(child->name, "conf", 4)) tegra_pinctrl_set_pin(child); - else if (!strncmp(child->name, "drive_", 6)) + else if (!strncmp(child->name, "drive", 5)) debug("%s: drive configuration is not supported\n", __func__); else tegra_pinctrl_set_func(child); diff --git a/drivers/power/pmic/max77663.c b/drivers/power/pmic/max77663.c index cf08b6a7e1d..c2a7cbf7e40 100644 --- a/drivers/power/pmic/max77663.c +++ b/drivers/power/pmic/max77663.c @@ -47,8 +47,9 @@ static int max77663_bind(struct udevice *dev) int children, ret; if (IS_ENABLED(CONFIG_SYSRESET_MAX77663)) { - ret = device_bind_driver(dev, MAX77663_RST_DRIVER, - "sysreset", NULL); + ret = device_bind_driver_to_node(dev, MAX77663_RST_DRIVER, + "sysreset", dev_ofnode(dev), + NULL); if (ret) { log_err("cannot bind SYSRESET (ret = %d)\n", ret); return ret; @@ -56,8 +57,8 @@ static int max77663_bind(struct udevice *dev) } if (IS_ENABLED(CONFIG_MAX77663_GPIO)) { - ret = device_bind_driver(dev, MAX77663_GPIO_DRIVER, - "gpio", NULL); + ret = device_bind_driver_to_node(dev, MAX77663_GPIO_DRIVER, + "gpio", dev_ofnode(dev), NULL); if (ret) { log_err("cannot bind GPIOs (ret = %d)\n", ret); return ret; diff --git a/drivers/power/pmic/palmas.c b/drivers/power/pmic/palmas.c index f676bf64169..37d4190fabe 100644 --- a/drivers/power/pmic/palmas.c +++ b/drivers/power/pmic/palmas.c @@ -49,8 +49,9 @@ static int palmas_bind(struct udevice *dev) int children, ret; if (IS_ENABLED(CONFIG_SYSRESET_PALMAS)) { - ret = device_bind_driver(dev, PALMAS_RST_DRIVER, - "sysreset", NULL); + ret = device_bind_driver_to_node(dev, PALMAS_RST_DRIVER, + "sysreset", dev_ofnode(dev), + NULL); if (ret) { log_err("cannot bind SYSRESET (ret = %d)\n", ret); return ret; diff --git a/drivers/power/regulator/tps65941_regulator.c b/drivers/power/regulator/tps65941_regulator.c index bc4d153fd84..13f94b730d4 100644 --- a/drivers/power/regulator/tps65941_regulator.c +++ b/drivers/power/regulator/tps65941_regulator.c @@ -388,6 +388,14 @@ static int tps65941_ldo_enable(struct udevice *dev, int op, bool *enable) return 0; } +static int tps65941_ldo_volt2val(__maybe_unused int idx, int uV) +{ + if (uV > TPS65941_LDO_VOLT_MAX || uV < TPS65941_LDO_VOLT_MIN) + return -EINVAL; + + return ((uV - 600000) / 50000 + 0x4) << TPS65941_LDO_MODE_MASK; +} + static int tps65941_ldo_val2volt(__maybe_unused int idx, int val) { if (val > TPS65941_LDO_VOLT_MAX_HEX || val < TPS65941_LDO_VOLT_MIN_HEX) @@ -459,7 +467,7 @@ static int tps65224_ldo_val2volt(int idx, int val) static const struct tps65941_reg_conv_ops ldo_conv_ops[] = { [TPS65941_LDO_CONV_OPS_IDX] = { .volt_mask = TPS65941_LDO_VOLT_MASK, - .volt2val = tps65941_buck_volt2val, + .volt2val = tps65941_ldo_volt2val, .val2volt = tps65941_ldo_val2volt, }, [TPS65224_LDO_CONV_OPS_IDX] = { @@ -472,7 +480,7 @@ static const struct tps65941_reg_conv_ops ldo_conv_ops[] = { static int tps65941_ldo_val(struct udevice *dev, int op, int *uV) { unsigned int hex, adr; - int ret, ret_volt, idx; + int ret, ret_volt, idx, ldo_bypass; struct dm_regulator_uclass_plat *uc_pdata; const struct tps65941_reg_conv_ops *conv_ops; ulong chip_id; @@ -502,7 +510,9 @@ static int tps65941_ldo_val(struct udevice *dev, int op, int *uV) if (ret < 0) return ret; + ldo_bypass = ret & TPS65941_LDO_BYPASS_EN; ret &= conv_ops->volt_mask; + ret = ret >> TPS65941_LDO_MODE_MASK; ret_volt = conv_ops->val2volt(idx, ret); if (ret_volt < 0) return ret_volt; @@ -531,7 +541,7 @@ static int tps65941_ldo_val(struct udevice *dev, int op, int *uV) ret &= ~TPS65224_LDO_VOLT_MASK; ret |= hex; } else { - ret = hex; + ret = hex | ldo_bypass; } ret = pmic_reg_write(dev->parent, adr, ret); diff --git a/drivers/tpm/tpm2_tis_mmio.c b/drivers/tpm/tpm2_tis_mmio.c index dee5503c055..fc62dcda9ef 100644 --- a/drivers/tpm/tpm2_tis_mmio.c +++ b/drivers/tpm/tpm2_tis_mmio.c @@ -135,7 +135,7 @@ static const struct tpm_ops tpm_tis_ops = { .cleanup = tpm_tis_cleanup, }; -static const struct tpm_tis_chip_data tpm_tis_std_chip_data = { +static struct tpm_tis_chip_data tpm_tis_std_chip_data = { .pcr_count = 24, .pcr_select_min = 3, }; diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig index 0100723a68b..682a6910655 100644 --- a/drivers/usb/dwc3/Kconfig +++ b/drivers/usb/dwc3/Kconfig @@ -87,6 +87,14 @@ config USB_DWC3_LAYERSCAPE Host and Peripheral operation modes are supported. OTG is not supported. +config USB_DWC3_STI + bool "STi USB wrapper" + depends on DM_USB && USB_DWC3_GENERIC && SYSCON + help + Enables support for the on-chip xHCI controller on STMicroelectronics + STiH407 family SoCs. This is a driver for the dwc3 to provide the + glue logic to configure the controller. + menu "PHY Subsystem" config USB_DWC3_PHY_OMAP diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile index a085c9d4628..985206eafe4 100644 --- a/drivers/usb/dwc3/Makefile +++ b/drivers/usb/dwc3/Makefile @@ -15,3 +15,4 @@ obj-$(CONFIG_USB_DWC3_UNIPHIER) += dwc3-uniphier.o obj-$(CONFIG_USB_DWC3_LAYERSCAPE) += dwc3-layerscape.o obj-$(CONFIG_USB_DWC3_PHY_OMAP) += ti_usb_phy.o obj-$(CONFIG_USB_DWC3_PHY_SAMSUNG) += samsung_usb_phy.o +obj-$(CONFIG_USB_DWC3_STI) += dwc3-generic-sti.o diff --git a/drivers/usb/dwc3/dwc3-generic-sti.c b/drivers/usb/dwc3/dwc3-generic-sti.c new file mode 100644 index 00000000000..b34f5ceceac --- /dev/null +++ b/drivers/usb/dwc3/dwc3-generic-sti.c @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause +/* + * STi specific glue layer for DWC3 + * + * Copyright (C) 2025, STMicroelectronics - All Rights Reserved + */ + +#define LOG_CATEGORY UCLASS_NOP + +#include <reset.h> +#include <regmap.h> +#include <syscon.h> +#include <asm/io.h> +#include <dm/device.h> +#include <dm/device_compat.h> +#include <dm/read.h> +#include <linux/usb/otg.h> +#include "dwc3-generic.h" + +/* glue registers */ +#define CLKRST_CTRL 0x00 +#define AUX_CLK_EN BIT(0) +#define SW_PIPEW_RESET_N BIT(4) +#define EXT_CFG_RESET_N BIT(8) + +#define XHCI_REVISION BIT(12) + +#define USB2_VBUS_MNGMNT_SEL1 0x2C +#define USB2_VBUS_UTMIOTG 0x1 + +#define SEL_OVERRIDE_VBUSVALID(n) ((n) << 0) +#define SEL_OVERRIDE_POWERPRESENT(n) ((n) << 4) +#define SEL_OVERRIDE_BVALID(n) ((n) << 8) + +/* Static DRD configuration */ +#define USB3_CONTROL_MASK 0xf77 + +#define USB3_DEVICE_NOT_HOST BIT(0) +#define USB3_FORCE_VBUSVALID BIT(1) +#define USB3_DELAY_VBUSVALID BIT(2) +#define USB3_SEL_FORCE_OPMODE BIT(4) +#define USB3_FORCE_OPMODE(n) ((n) << 5) +#define USB3_SEL_FORCE_DPPULLDOWN2 BIT(8) +#define USB3_FORCE_DPPULLDOWN2 BIT(9) +#define USB3_SEL_FORCE_DMPULLDOWN2 BIT(10) +#define USB3_FORCE_DMPULLDOWN2 BIT(11) + +static void dwc3_stih407_glue_configure(struct udevice *dev, int index, + enum usb_dr_mode mode) +{ + struct dwc3_glue_data *glue = dev_get_plat(dev); + struct regmap *regmap; + ulong syscfg_base; + ulong syscfg_offset; + ulong glue_base; + int ret; + + /* deassert both powerdown and softreset */ + ret = reset_deassert_bulk(&glue->resets); + if (ret) { + dev_err(dev, "reset_deassert_bulk error: %d\n", ret); + return; + } + + regmap = syscon_regmap_lookup_by_phandle(dev, "st,syscfg"); + if (IS_ERR(regmap)) { + dev_err(dev, "unable to get st,syscfg, dev %s\n", dev->name); + return; + } + + syscfg_base = regmap->ranges[0].start; + glue_base = dev_read_addr_index(dev, 0); + syscfg_offset = dev_read_addr_index(dev, 1); + + clrbits_le32(syscfg_base + syscfg_offset, USB3_CONTROL_MASK); + + /* glue drd init */ + switch (mode) { + case USB_DR_MODE_PERIPHERAL: + clrbits_le32(syscfg_base + syscfg_offset, + USB3_DELAY_VBUSVALID | USB3_SEL_FORCE_OPMODE | + USB3_FORCE_OPMODE(0x3) | USB3_SEL_FORCE_DPPULLDOWN2 | + USB3_FORCE_DPPULLDOWN2 | USB3_SEL_FORCE_DMPULLDOWN2 | + USB3_FORCE_DMPULLDOWN2); + + setbits_le32(syscfg_base + syscfg_offset, + USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID); + break; + + case USB_DR_MODE_HOST: + clrbits_le32(syscfg_base + syscfg_offset, + USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID | + USB3_SEL_FORCE_OPMODE | USB3_FORCE_OPMODE(0x3) | + USB3_SEL_FORCE_DPPULLDOWN2 | USB3_FORCE_DPPULLDOWN2 | + USB3_SEL_FORCE_DMPULLDOWN2 | USB3_FORCE_DMPULLDOWN2); + + setbits_le32(syscfg_base + syscfg_offset, USB3_DELAY_VBUSVALID); + break; + + default: + dev_err(dev, "Unsupported mode of operation %d\n", mode); + return; + } + + /* glue init */ + setbits_le32(glue_base + CLKRST_CTRL, AUX_CLK_EN | EXT_CFG_RESET_N | XHCI_REVISION); + clrbits_le32(glue_base + CLKRST_CTRL, SW_PIPEW_RESET_N); + + /* configure mux for vbus, powerpresent and bvalid signals */ + setbits_le32(glue_base + USB2_VBUS_MNGMNT_SEL1, + SEL_OVERRIDE_VBUSVALID(USB2_VBUS_UTMIOTG) | + SEL_OVERRIDE_POWERPRESENT(USB2_VBUS_UTMIOTG) | + SEL_OVERRIDE_BVALID(USB2_VBUS_UTMIOTG)); + setbits_le32(glue_base + CLKRST_CTRL, SW_PIPEW_RESET_N); +}; + +struct dwc3_glue_ops stih407_ops = { + .glue_configure = dwc3_stih407_glue_configure, +}; + +static const struct udevice_id dwc3_sti_match[] = { + { .compatible = "st,stih407-dwc3", .data = (ulong)&stih407_ops}, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(dwc3_sti_wrapper) = { + .name = "dwc3-sti", + .id = UCLASS_NOP, + .of_match = dwc3_sti_match, + .bind = dwc3_glue_bind, + .probe = dwc3_glue_probe, + .remove = dwc3_glue_remove, + .plat_auto = sizeof(struct dwc3_glue_data), +}; diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c index 55e62b35c61..21452ad1569 100644 --- a/drivers/usb/dwc3/dwc3-generic.c +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -7,29 +7,17 @@ * Based on dwc3-omap.c. */ -#include <cpu_func.h> -#include <log.h> #include <dm.h> -#include <dm/device-internal.h> +#include <reset.h> +#include <asm/gpio.h> #include <dm/lists.h> -#include <dwc3-uboot.h> -#include <generic-phy.h> -#include <linux/bitops.h> #include <linux/delay.h> -#include <linux/printk.h> -#include <linux/usb/ch9.h> #include <linux/usb/gadget.h> -#include <malloc.h> #include <power/regulator.h> -#include <usb.h> -#include "core.h" -#include "gadget.h" -#include <reset.h> -#include <clk.h> #include <usb/xhci.h> -#include <asm/gpio.h> - +#include "core.h" #include "dwc3-generic.h" +#include "gadget.h" struct dwc3_generic_plat { fdt_addr_t base; diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c index ffe1ae6eb73..d3fc4acb401 100644 --- a/drivers/usb/gadget/f_mass_storage.c +++ b/drivers/usb/gadget/f_mass_storage.c @@ -682,6 +682,7 @@ static int sleep_thread(struct fsg_common *common) k = 0; } + schedule(); dm_usb_gadget_handle_interrupts(udcdev); } common->thread_wakeup_needed = 0; diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c index 631969b3405..f2540eb6ded 100644 --- a/drivers/usb/gadget/g_dnl.c +++ b/drivers/usb/gadget/g_dnl.c @@ -207,7 +207,8 @@ void g_dnl_clear_detach(void) static int on_serialno(const char *name, const char *value, enum env_op op, int flags) { - g_dnl_set_serialnumber((char *)value); + if (value) + g_dnl_set_serialnumber((char *)value); return 0; } U_BOOT_ENV_CALLBACK(serialno, on_serialno); diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index a656265890e..3dc79770eeb 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -110,15 +110,6 @@ config USB_XHCI_RCAR Choose this option to add support for USB 3.0 driver on Renesas R-Car Gen3 SoCs. -config USB_XHCI_STI - bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB controller" - depends on ARCH_STI - default y - help - Enables support for the on-chip xHCI controller on STMicroelectronics - STiH407 family SoCs. This is a driver for the dwc3 to provide the glue logic - to configure the controller. - config USB_XHCI_DRA7XX_INDEX int "DRA7XX xHCI USB index" range 0 1 diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 301bb9fdee1..902d68d0378 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -54,7 +54,6 @@ obj-$(CONFIG_USB_XHCI_GENERIC) += xhci-generic.o obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o obj-$(CONFIG_USB_XHCI_RCAR) += xhci-rcar.o -obj-$(CONFIG_USB_XHCI_STI) += dwc3-sti-glue.o obj-$(CONFIG_USB_XHCI_OCTEON) += dwc3-octeon-glue.o # designware diff --git a/drivers/usb/host/dwc3-sti-glue.c b/drivers/usb/host/dwc3-sti-glue.c deleted file mode 100644 index 3e6834e38e3..00000000000 --- a/drivers/usb/host/dwc3-sti-glue.c +++ /dev/null @@ -1,253 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * STiH407 family DWC3 specific Glue layer - * - * Copyright (C) 2017, STMicroelectronics - All Rights Reserved - * Author(s): Patrice Chotard, <[email protected]> for STMicroelectronics. - */ - -#include <log.h> -#include <asm/global_data.h> -#include <asm/io.h> -#include <dm.h> -#include <errno.h> -#include <dm/lists.h> -#include <regmap.h> -#include <reset-uclass.h> -#include <syscon.h> -#include <usb.h> -#include <linux/printk.h> - -#include <linux/usb/dwc3.h> -#include <linux/usb/otg.h> -#include <dwc3-sti-glue.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* - * struct sti_dwc3_glue_plat - dwc3 STi glue driver private structure - * @syscfg_base: addr for the glue syscfg - * @glue_base: addr for the glue registers - * @syscfg_offset: usb syscfg control offset - * @powerdown_ctl: rest controller for powerdown signal - * @softreset_ctl: reset controller for softreset signal - * @mode: drd static host/device config - */ -struct sti_dwc3_glue_plat { - phys_addr_t syscfg_base; - phys_addr_t glue_base; - phys_addr_t syscfg_offset; - struct reset_ctl powerdown_ctl; - struct reset_ctl softreset_ctl; - enum usb_dr_mode mode; -}; - -static int sti_dwc3_glue_drd_init(struct sti_dwc3_glue_plat *plat) -{ - unsigned long val; - - val = readl(plat->syscfg_base + plat->syscfg_offset); - - val &= USB3_CONTROL_MASK; - - switch (plat->mode) { - case USB_DR_MODE_PERIPHERAL: - val &= ~(USB3_DELAY_VBUSVALID - | USB3_SEL_FORCE_OPMODE | USB3_FORCE_OPMODE(0x3) - | USB3_SEL_FORCE_DPPULLDOWN2 | USB3_FORCE_DPPULLDOWN2 - | USB3_SEL_FORCE_DMPULLDOWN2 | USB3_FORCE_DMPULLDOWN2); - - val |= USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID; - break; - - case USB_DR_MODE_HOST: - val &= ~(USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID - | USB3_SEL_FORCE_OPMODE | USB3_FORCE_OPMODE(0x3) - | USB3_SEL_FORCE_DPPULLDOWN2 | USB3_FORCE_DPPULLDOWN2 - | USB3_SEL_FORCE_DMPULLDOWN2 | USB3_FORCE_DMPULLDOWN2); - - val |= USB3_DELAY_VBUSVALID; - break; - - default: - pr_err("Unsupported mode of operation %d\n", plat->mode); - return -EINVAL; - } - writel(val, plat->syscfg_base + plat->syscfg_offset); - - return 0; -} - -static void sti_dwc3_glue_init(struct sti_dwc3_glue_plat *plat) -{ - unsigned long reg; - - reg = readl(plat->glue_base + CLKRST_CTRL); - - reg |= AUX_CLK_EN | EXT_CFG_RESET_N | XHCI_REVISION; - reg &= ~SW_PIPEW_RESET_N; - - writel(reg, plat->glue_base + CLKRST_CTRL); - - /* configure mux for vbus, powerpresent and bvalid signals */ - reg = readl(plat->glue_base + USB2_VBUS_MNGMNT_SEL1); - - reg |= SEL_OVERRIDE_VBUSVALID(USB2_VBUS_UTMIOTG) | - SEL_OVERRIDE_POWERPRESENT(USB2_VBUS_UTMIOTG) | - SEL_OVERRIDE_BVALID(USB2_VBUS_UTMIOTG); - - writel(reg, plat->glue_base + USB2_VBUS_MNGMNT_SEL1); - - setbits_le32(plat->glue_base + CLKRST_CTRL, SW_PIPEW_RESET_N); -} - -static int sti_dwc3_glue_of_to_plat(struct udevice *dev) -{ - struct sti_dwc3_glue_plat *plat = dev_get_plat(dev); - struct udevice *syscon; - struct regmap *regmap; - int ret; - u32 reg[4]; - - ret = ofnode_read_u32_array(dev_ofnode(dev), "reg", reg, - ARRAY_SIZE(reg)); - if (ret) { - pr_err("unable to find st,stih407-dwc3 reg property(%d)\n", ret); - return ret; - } - - plat->glue_base = reg[0]; - plat->syscfg_offset = reg[2]; - - /* get corresponding syscon phandle */ - ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "st,syscfg", - &syscon); - if (ret) { - pr_err("unable to find syscon device (%d)\n", ret); - return ret; - } - - /* get syscfg-reg base address */ - regmap = syscon_get_regmap(syscon); - if (!regmap) { - pr_err("unable to find regmap\n"); - return -ENODEV; - } - plat->syscfg_base = regmap->ranges[0].start; - - /* get powerdown reset */ - ret = reset_get_by_name(dev, "powerdown", &plat->powerdown_ctl); - if (ret) { - pr_err("can't get powerdown reset for %s (%d)", dev->name, ret); - return ret; - } - - /* get softreset reset */ - ret = reset_get_by_name(dev, "softreset", &plat->softreset_ctl); - if (ret) - pr_err("can't get soft reset for %s (%d)", dev->name, ret); - - return ret; -}; - -static int sti_dwc3_glue_bind(struct udevice *dev) -{ - struct sti_dwc3_glue_plat *plat = dev_get_plat(dev); - ofnode node, dwc3_node; - - /* Find snps,dwc3 node from subnode */ - ofnode_for_each_subnode(node, dev_ofnode(dev)) { - if (ofnode_device_is_compatible(node, "snps,dwc3")) - dwc3_node = node; - } - - if (!ofnode_valid(dwc3_node)) { - pr_err("Can't find dwc3 subnode for %s\n", dev->name); - return -ENODEV; - } - - /* retrieve the DWC3 dual role mode */ - plat->mode = usb_get_dr_mode(dwc3_node); - if (plat->mode == USB_DR_MODE_UNKNOWN) - /* by default set dual role mode to HOST */ - plat->mode = USB_DR_MODE_HOST; - - return dm_scan_fdt_dev(dev); -} - -static int sti_dwc3_glue_probe(struct udevice *dev) -{ - struct sti_dwc3_glue_plat *plat = dev_get_plat(dev); - int ret; - - /* deassert both powerdown and softreset */ - ret = reset_deassert(&plat->powerdown_ctl); - if (ret < 0) { - pr_err("DWC3 powerdown reset deassert failed: %d", ret); - return ret; - } - - ret = reset_deassert(&plat->softreset_ctl); - if (ret < 0) { - pr_err("DWC3 soft reset deassert failed: %d", ret); - goto softreset_err; - } - - ret = sti_dwc3_glue_drd_init(plat); - if (ret) - goto init_err; - - sti_dwc3_glue_init(plat); - - return 0; - -init_err: - ret = reset_assert(&plat->softreset_ctl); - if (ret < 0) { - pr_err("DWC3 soft reset deassert failed: %d", ret); - return ret; - } - -softreset_err: - ret = reset_assert(&plat->powerdown_ctl); - if (ret < 0) - pr_err("DWC3 powerdown reset deassert failed: %d", ret); - - return ret; -} - -static int sti_dwc3_glue_remove(struct udevice *dev) -{ - struct sti_dwc3_glue_plat *plat = dev_get_plat(dev); - int ret; - - /* assert both powerdown and softreset */ - ret = reset_assert(&plat->powerdown_ctl); - if (ret < 0) { - pr_err("DWC3 powerdown reset deassert failed: %d", ret); - return ret; - } - - ret = reset_assert(&plat->softreset_ctl); - if (ret < 0) - pr_err("DWC3 soft reset deassert failed: %d", ret); - - return ret; -} - -static const struct udevice_id sti_dwc3_glue_ids[] = { - { .compatible = "st,stih407-dwc3" }, - { } -}; - -U_BOOT_DRIVER(dwc3_sti_glue) = { - .name = "dwc3_sti_glue", - .id = UCLASS_NOP, - .of_match = sti_dwc3_glue_ids, - .of_to_plat = sti_dwc3_glue_of_to_plat, - .probe = sti_dwc3_glue_probe, - .remove = sti_dwc3_glue_remove, - .bind = sti_dwc3_glue_bind, - .plat_auto = sizeof(struct sti_dwc3_glue_plat), - .flags = DM_FLAG_ALLOC_PRIV_DMA, -}; |
