diff options
| author | Andreas Schwab <[email protected]> | 2026-01-28 17:51:02 +0100 |
|---|---|---|
| committer | Leo Yu-Chi Liang <[email protected]> | 2026-03-13 02:56:52 +0800 |
| commit | 4dcff3b572a1d67c35b7ed71253a6d85aefe4e9b (patch) | |
| tree | 3df79677fe738a9da911105c97171457777c2383 /drivers | |
| parent | 8bc2a5196c1c0bb5dbdaca073323da0015a0de37 (diff) | |
sifive: switch to OF_UPSTREAM
Tested on HiFive Unleashed and HiFive Unmatched, both SPIFlash and MMC boot.
Signed-off-by: Andreas Schwab <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/clk/sifive/fu540-prci.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c index e55a26ab8fd..5d0b08d3755 100644 --- a/drivers/clk/sifive/fu540-prci.c +++ b/drivers/clk/sifive/fu540-prci.c @@ -59,25 +59,25 @@ static const struct __prci_clock_ops sifive_fu540_prci_tlclksel_clk_ops = { /* List of clock controls provided by the PRCI */ static struct __prci_clock __prci_init_clocks_fu540[] = { - [PRCI_CLK_COREPLL] = { + [FU540_PRCI_CLK_COREPLL] = { .name = "corepll", .parent_name = "hfclk", .ops = &sifive_fu540_prci_wrpll_clk_ops, .pwd = &__prci_corepll_data, }, - [PRCI_CLK_DDRPLL] = { + [FU540_PRCI_CLK_DDRPLL] = { .name = "ddrpll", .parent_name = "hfclk", .ops = &sifive_fu540_prci_wrpll_clk_ops, .pwd = &__prci_ddrpll_data, }, - [PRCI_CLK_GEMGXLPLL] = { + [FU540_PRCI_CLK_GEMGXLPLL] = { .name = "gemgxlpll", .parent_name = "hfclk", .ops = &sifive_fu540_prci_wrpll_clk_ops, .pwd = &__prci_gemgxlpll_data, }, - [PRCI_CLK_TLCLK] = { + [FU540_PRCI_CLK_TLCLK] = { .name = "tlclk", .parent_name = "corepll", .ops = &sifive_fu540_prci_tlclksel_clk_ops, |