diff options
| author | Peng Fan <[email protected]> | 2017-04-10 19:44:33 +0800 |
|---|---|---|
| committer | Stefano Babic <[email protected]> | 2017-04-18 15:59:30 +0200 |
| commit | 4f55bd1c0ba12a2309bef7db33b0d4802e927647 (patch) | |
| tree | 559404c76a30163e8d2c7c186574cc7c4769d0a8 /drivers | |
| parent | 3fea95369850987de15a2a0ac009d05e13b90246 (diff) | |
net: fec: do not access reserved register for i.MX6ULL
The MIB RAM and FIFO receive start register does not exist on
i.MX6ULL. Accessing these register will cause enet not work well or
cause system report fault.
Signed-off-by: Peng Fan <[email protected]>
Cc: Joe Hershberger <[email protected]>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/fec_mxc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 910879ba3e4..ac7afb5b35e 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -563,7 +563,7 @@ static int fec_init(struct eth_device *dev, bd_t *bd) writel(0x00000000, &fec->eth->gaddr2); /* Do not access reserved register for i.MX6UL */ - if (!is_mx6ul()) { + if (!is_mx6ul() && !is_mx6ull()) { /* clear MIB RAM */ for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4) writel(0, i); |