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authorTom Rini <[email protected]>2022-06-15 12:03:44 -0400
committerTom Rini <[email protected]>2022-07-05 17:03:01 -0400
commit69a2bb63215f61cca52ecf037df18999edbf2061 (patch)
treec58b3416388bcf8dca3089fcc93867f79040ba29 /drivers
parent89d888ed6db14cf396ade61c38e71a93e57dd3b6 (diff)
net: designware: Rename CONFIG_DW_GMAC_DEFAULT_DMA_PBL to GMAC_DEFAULT_DMA_PBL
This value is always used at the default, rename it for now. This likely should come from the device tree if non-default, moving forward. Signed-off-by: Tom Rini <[email protected]>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/designware.h8
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/net/designware.h b/drivers/net/designware.h
index ddc3d4f1506..3793d550980 100644
--- a/drivers/net/designware.h
+++ b/drivers/net/designware.h
@@ -85,10 +85,8 @@ struct eth_dma_regs {
#define DW_DMA_BASE_OFFSET (0x1000)
-/* Default DMA Burst length */
-#ifndef CONFIG_DW_GMAC_DEFAULT_DMA_PBL
-#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL 8
-#endif
+/* DMA Burst length */
+#define GMAC_DEFAULT_DMA_PBL 8
/* Bus mode register definitions */
#define FIXEDBURST (1 << 16)
@@ -96,7 +94,7 @@ struct eth_dma_regs {
#define PRIORXTX_31 (2 << 14)
#define PRIORXTX_21 (1 << 14)
#define PRIORXTX_11 (0 << 14)
-#define DMA_PBL (CONFIG_DW_GMAC_DEFAULT_DMA_PBL<<8)
+#define DMA_PBL (GMAC_DEFAULT_DMA_PBL << 8)
#define RXHIGHPRIO (1 << 1)
#define DMAMAC_SRST (1 << 0)