Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh

This is R-Car X5H support. It was originally posted before rc1 and the
changes are well isolated. This is the final patchset which enables the
Gen5 drivers that are already in tree. I waited with this a bit until
the SCMI ID discussion stabilized and TFA X5H support landed. So now, I
can add the final piece into U-Boot too.

Note that this is still very much experimental, the X5H upstreaming is
in very early stages. The OF_UPSTREAM conversion will happen likely in
2026.04 or 2026.07 window, depending on when the Linux DTs land. The
compound-clock.c is surely going to go away once SCP gets updated and
the MFIS mailbox will be reworked once upstream bindings get developed.

This also includes SH DT alignment fix.

5 files changed, 166 insertions, 0 deletions

diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
index 6c742553091..354035baf2d 100644
--- a/drivers/clk/renesas/Makefile
+++ b/drivers/clk/renesas/Makefile
@@ -26,3 +26,7 @@ obj-$(CONFIG_CLK_R8A779H0) += r8a779h0-cpg-mssr.o
 obj-$(CONFIG_CLK_R9A06G032) += r9a06g032-clocks.o
 obj-$(CONFIG_CLK_RZG2L) += rzg2l-cpg.o
 obj-$(CONFIG_CLK_R9A07G044) += r9a07g044-cpg.o
+
+# Temporary stub clock used for SCP compatibility.
+# This is going to be removed once SCP solidifies.
+obj-$(CONFIG_R8A78000) += compound-clock.o
diff --git a/drivers/clk/renesas/compound-clock.c b/drivers/clk/renesas/compound-clock.c
new file mode 100644
index 00000000000..499a2598833
--- /dev/null
+++ b/drivers/clk/renesas/compound-clock.c
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2025 Marek Vasut <[email protected]>
+ */
+
+#define LOG_CATEGORY UCLASS_CLK
+
+#include <clk-uclass.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <linux/clk-provider.h>
+#include <log.h>
+
+struct clk_compound_rate {
+	struct clk clk;		/* This clock */
+	struct clk mdlc;	/* MDLC parent module clock */
+	struct clk per;		/* Peripheral parent clock */
+};
+
+static struct clk_compound_rate *to_clk_compound_rate(struct clk *clk)
+{
+	return (struct clk_compound_rate *)dev_get_plat(clk->dev);
+}
+
+static int clk_compound_rate_enable(struct clk *clk)
+{
+	struct clk_compound_rate *cc = to_clk_compound_rate(clk);
+
+	return clk_enable(&cc->mdlc);
+}
+
+static int clk_compound_rate_disable(struct clk *clk)
+{
+	struct clk_compound_rate *cc = to_clk_compound_rate(clk);
+
+	return clk_disable(&cc->mdlc);
+}
+
+static ulong clk_compound_rate_get_rate(struct clk *clk)
+{
+	struct clk_compound_rate *cc = to_clk_compound_rate(clk);
+
+	return clk_get_rate(&cc->per);
+}
+
+static ulong clk_compound_rate_set_rate(struct clk *clk, ulong rate)
+{
+	return 0;	/* Set rate is not forwarded to SCP */
+}
+
+const struct clk_ops clk_compound_rate_ops = {
+	.enable		= clk_compound_rate_enable,
+	.disable	= clk_compound_rate_disable,
+	.get_rate	= clk_compound_rate_get_rate,
+	.set_rate	= clk_compound_rate_set_rate,
+};
+
+static int clk_compound_rate_of_to_plat(struct udevice *dev)
+{
+	struct clk_compound_rate *cc = (struct clk_compound_rate *)dev_get_plat(dev);
+	struct clk *clk = &cc->clk;
+	int ret;
+
+	clk->dev = dev;
+	clk->id = CLK_ID(dev, 0);
+	clk->enable_count = 0;
+
+	ret = clk_get_by_index(dev, 0, &cc->mdlc);
+	if (ret)
+		return ret;
+
+	ret = clk_get_by_index(dev, 1, &cc->per);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static const struct udevice_id clk_compound_rate_match[] = {
+	{ .compatible = "renesas,compound-clock", },
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(renesas_compound_clock) = {
+	.name = "compound-clock",
+	.id = UCLASS_CLK,
+	.of_match = clk_compound_rate_match,
+	.of_to_plat = clk_compound_rate_of_to_plat,
+	.plat_auto	= sizeof(struct clk_compound_rate),
+	.ops = &clk_compound_rate_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index f9531c1627c..cfd2a3be3fd 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -66,6 +66,16 @@ config K3_SEC_PROXY
 	  Select this driver if your platform has support for this hardware
 	  block.
 
+config RCAR_MFIS_MBOX
+	bool "Renesas MFIS Multifunctional Interface mailbox driver"
+	depends on DM_MAILBOX && ARCH_RENESAS
+	help
+	  This enables support for the Renesas MFIS mailbox module, which
+	  provides an interface between the different CPU Cores, such as AP
+	  System Core domain and the Realtime Core domain, SCP Core domain
+	  and AP System Core domain or Realtime Core domain and AP System
+	  Core domain or Realtime Core domain.
+
 config ZYNQMP_IPI
 	bool "Xilinx ZynqMP IPI controller support"
 	depends on DM_MAILBOX && (ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL_NET || ARCH_VERSAL2)
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
index b54fbdfff15..b3a36691497 100644
--- a/drivers/mailbox/Makefile
+++ b/drivers/mailbox/Makefile
@@ -12,4 +12,5 @@ obj-$(CONFIG_SANDBOX_MBOX) += sandbox-mbox-test.o
 obj-$(CONFIG_STM32_IPCC) += stm32-ipcc.o
 obj-$(CONFIG_TEGRA_HSP) += tegra-hsp.o
 obj-$(CONFIG_K3_SEC_PROXY) += k3-sec-proxy.o
+obj-$(CONFIG_RCAR_MFIS_MBOX) += renesas-mfis.o
 obj-$(CONFIG_ZYNQMP_IPI) += zynqmp-ipi.o
diff --git a/drivers/mailbox/renesas-mfis.c b/drivers/mailbox/renesas-mfis.c
new file mode 100644
index 00000000000..1e9e8285974
--- /dev/null
+++ b/drivers/mailbox/renesas-mfis.c
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2020-2025, Renesas Electronics Corporation.
+ */
+
+#include <asm/io.h>
+#include <dm.h>
+#include <linux/delay.h>
+#include <mailbox-uclass.h>
+
+#define COM		0x0
+#define IIR		BIT(0)
+
+struct mfis_priv {
+	void __iomem	*tx_base;
+};
+
+static int mfis_send(struct mbox_chan *chan, const void *data)
+{
+	struct mfis_priv *mfis = dev_get_priv(chan->dev);
+
+	writel(IIR, mfis->tx_base + COM);
+
+	/* Give the remote side some time. */
+	mdelay(1);
+
+	writel(0, mfis->tx_base + COM);
+
+	return 0;
+}
+
+struct mbox_ops mfis_mbox_ops = {
+	.send		= mfis_send,
+};
+
+static int mfis_mbox_probe(struct udevice *dev)
+{
+	struct mfis_priv *mbox = dev_get_priv(dev);
+
+	mbox->tx_base = dev_read_addr_index_ptr(dev, 0);
+	if (!mbox->tx_base)
+		return -ENODEV;
+
+	return 0;
+}
+
+static const struct udevice_id mfis_mbox_of_match[] = {
+	{ .compatible = "renesas,mfis-mbox", },
+	{},
+};
+
+U_BOOT_DRIVER(renesas_mfis) = {
+	.name		= "renesas-mfis",
+	.id		= UCLASS_MAILBOX,
+	.of_match	= mfis_mbox_of_match,
+	.probe		= mfis_mbox_probe,
+	.priv_auto	= sizeof(struct mfis_priv),
+	.ops		= &mfis_mbox_ops,
+};