diff options
| author | Christian Marangi <[email protected]> | 2024-08-03 10:43:21 +0200 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2024-08-19 16:15:26 -0600 |
| commit | 72461389583985a09b548b02f50fdfef817c621a (patch) | |
| tree | 6ad49b424b62a59289c147f00c3fa70cd2e03856 /drivers | |
| parent | bae88e769227fa21291dd7f38ea7c1a737100225 (diff) | |
clk: mediatek: mt7622: move INFRA_TRNG to the bottom
Move INFRA_TRNG clock to the bottom of the clk ID to match upstream
linux order. This is in preparation of OF_UPSTREAM.
Signed-off-by: Christian Marangi <[email protected]>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/clk/mediatek/clk-mt7622.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/mediatek/clk-mt7622.c b/drivers/clk/mediatek/clk-mt7622.c index 4a7c5faff1a..8f173b79453 100644 --- a/drivers/clk/mediatek/clk-mt7622.c +++ b/drivers/clk/mediatek/clk-mt7622.c @@ -382,11 +382,11 @@ static const struct mtk_gate_regs infra_cg_regs = { static const struct mtk_gate infra_cgs[] = { GATE_INFRA(CLK_INFRA_DBGCLK_PD, CLK_TOP_AXI_SEL, 0), - GATE_INFRA(CLK_INFRA_TRNG, CLK_TOP_AXI_SEL, 2), GATE_INFRA(CLK_INFRA_AUDIO_PD, CLK_TOP_AUD_INTBUS_SEL, 5), GATE_INFRA(CLK_INFRA_IRRX_PD, CLK_TOP_IRRX_SEL, 16), GATE_INFRA(CLK_INFRA_APXGPT_PD, CLK_TOP_F10M_REF_SEL, 18), GATE_INFRA(CLK_INFRA_PMIC_PD, CLK_TOP_PMICSPI_SEL, 22), + GATE_INFRA(CLK_INFRA_TRNG, CLK_TOP_AXI_SEL, 2), }; /* pericfg */ |