diff options
| author | Tom Rini <[email protected]> | 2023-05-04 11:49:30 -0400 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2023-05-04 11:49:30 -0400 |
| commit | 7f30eec1779b8f641b9563a1dab6a6865916ec01 (patch) | |
| tree | 9d0b296416d6820d45cfa24bdebe1ef81ef44b1c /drivers | |
| parent | bfce695104d59a8570ce0a7cbd75d3728117eb5d (diff) | |
| parent | 0d734df4a459f01fdf1e62512fb28b28022cb6a9 (diff) | |
Merge branch '2023-05-03-assorted-updates-and-fixes'
- Various typo fixes, pass -Werror to host tools builds, bdi cleanups,
fix hush and local variables, a FSL PCI fix and correct some python in
one of the tests.
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pci/pcie_fsl.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index 4600652f2b1..8d89a1e5919 100644 --- a/drivers/pci/pcie_fsl.c +++ b/drivers/pci/pcie_fsl.c @@ -58,6 +58,14 @@ static int fsl_pcie_read_config(const struct udevice *bus, pci_dev_t bdf, return 0; } + /* Skip Freescale PCIe controller's PEXCSRBAR register */ + if (PCI_BUS(bdf) - dev_seq(bus) == 0 && + PCI_DEV(bdf) == 0 && PCI_FUNC(bdf) == 0 && + (offset & ~3) == PCI_BASE_ADDRESS_0) { + *valuep = 0; + return 0; + } + val = PCI_CONF1_EXT_ADDRESS(PCI_BUS(bdf) - dev_seq(bus), PCI_DEV(bdf), PCI_FUNC(bdf), offset); @@ -95,6 +103,12 @@ static int fsl_pcie_write_config(struct udevice *bus, pci_dev_t bdf, if (fsl_pcie_addr_valid(pcie, bdf)) return 0; + /* Skip Freescale PCIe controller's PEXCSRBAR register */ + if (PCI_BUS(bdf) - dev_seq(bus) == 0 && + PCI_DEV(bdf) == 0 && PCI_FUNC(bdf) == 0 && + (offset & ~3) == PCI_BASE_ADDRESS_0) + return 0; + val = PCI_CONF1_EXT_ADDRESS(PCI_BUS(bdf) - dev_seq(bus), PCI_DEV(bdf), PCI_FUNC(bdf), offset); |
