diff options
| author | Tony Dinh <[email protected]> | 2025-09-29 14:49:12 -0700 |
|---|---|---|
| committer | Stefan Roese <[email protected]> | 2025-10-13 16:13:21 +0200 |
| commit | 81598d19ca7d60724c403a3ed4a10840e177288b (patch) | |
| tree | 5382e9cce3ee3c1bcf2ca386a969ad3b61d3791e /drivers | |
| parent | b44f18923be58ecc5087f7a12d3204a16d468eec (diff) | |
pci: mvebu: Unable to assign mbus windows for 2nd pcie controller
Correct the memory and IO mbus windows size increments in mvebu_pcie_bind.
Currently, pcie1 controller resource_size(&mem) and resource_size(&io)
checks result in a failure. This is because mem.end and io.end must be
incremented at the end of pcie0 windows assignment.
Signed-off-by: Tony Dinh <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pci/pci_mvebu.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c index 77815513b76..3985bd59607 100644 --- a/drivers/pci/pci_mvebu.c +++ b/drivers/pci/pci_mvebu.c @@ -763,6 +763,7 @@ static int mvebu_pcie_bind(struct udevice *parent) pcie->mem.start = mem.start; pcie->mem.end = mem.start + SZ_128M - 1; mem.start += SZ_128M; + mem.end = mem.start + SZ_128M - 1; } else { printf("%s: unable to assign mbus window for mem\n", pcie->name); pcie->mem.start = 0; @@ -773,6 +774,7 @@ static int mvebu_pcie_bind(struct udevice *parent) pcie->io.start = io.start; pcie->io.end = io.start + SZ_64K - 1; io.start += SZ_64K; + io.end = io.start + SZ_64K - 1; } else { printf("%s: unable to assign mbus window for io\n", pcie->name); pcie->io.start = 0; |
