diff options
| author | Andy Fleming <[email protected]> | 2007-04-23 02:24:28 -0500 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <[email protected]> | 2007-04-23 19:58:28 -0500 |
| commit | 81f481ca708ed6a56bf9c410e3191dbad581c565 (patch) | |
| tree | c9f7d03b85dca50b7ce2a34de53d24fc07cb16bb /drivers | |
| parent | 0d8c3a2096eaff8d7de89d45e9af4d4b0d4868fe (diff) | |
Enable 8544 support
* Add support to the Makefile
* Add 8544 configuration support to the tsec driver
* Add 8544 SVR numbers to processor.h
Signed-off-by: Ed Swarthout <[email protected]>
Signed-off-by: Jon Loeliger <[email protected]>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/tsec.c | 6 | ||||
| -rw-r--r-- | drivers/tsec.h | 3 |
2 files changed, 7 insertions, 2 deletions
diff --git a/drivers/tsec.c b/drivers/tsec.c index 3f11eb03b41..ed35f227c1b 100644 --- a/drivers/tsec.c +++ b/drivers/tsec.c @@ -5,7 +5,7 @@ * terms of the GNU Public License, Version 2, incorporated * herein by reference. * - * Copyright 2004 Freescale Semiconductor. + * Copyright 2004, 2007 Freescale Semiconductor, Inc. * (C) Copyright 2003, Motorola, Inc. * author Andy Fleming * @@ -66,7 +66,11 @@ struct tsec_info_struct { */ static struct tsec_info_struct tsec_info[] = { #if defined(CONFIG_MPC85XX_TSEC1) || defined(CONFIG_MPC83XX_TSEC1) +#if defined(CONFIG_MPC8544DS) + {TSEC1_PHY_ADDR, TSEC_GIGABIT | TSEC_REDUCED, TSEC1_PHYIDX}, +#else {TSEC1_PHY_ADDR, TSEC_GIGABIT, TSEC1_PHYIDX}, +#endif #elif defined(CONFIG_MPC86XX_TSEC1) {TSEC1_PHY_ADDR, TSEC_GIGABIT | TSEC_REDUCED, TSEC1_PHYIDX}, #else diff --git a/drivers/tsec.h b/drivers/tsec.h index 422bc669229..7bf3dee2b68 100644 --- a/drivers/tsec.h +++ b/drivers/tsec.h @@ -7,7 +7,7 @@ * terms of the GNU Public License, Version 2, incorporated * herein by reference. * - * Copyright 2004 Freescale Semiconductor. + * Copyright 2004, 2007 Freescale Semiconductor, Inc. * (C) Copyright 2003, Motorola, Inc. * maintained by Xianghua Xiao ([email protected]) * author Andy Fleming @@ -65,6 +65,7 @@ #define ECNTRL_INIT_SETTINGS 0x00001000 #define ECNTRL_TBI_MODE 0x00000020 #define ECNTRL_R100 0x00000008 +#define ECNTRL_SGMII_MODE 0x00000002 #define miim_end -2 #define miim_read -1 |