diff options
| author | Jonas Karlman <[email protected]> | 2026-01-29 21:01:51 +0000 |
|---|---|---|
| committer | Jerome Forissier <[email protected]> | 2026-02-06 16:42:45 +0100 |
| commit | 8beb70f2309d6fd6abb1d5c539edab9b0934d656 (patch) | |
| tree | ae6144a083d7d22174f149e8303097ed6124bdf8 /drivers | |
| parent | 34c1ab534c69366d6eeb3d693a9afd37bd14aba5 (diff) | |
net: dwc_eth_qos: Start DMA and MAC after tail pointers are initialized
The DesignWare Cores Ethernet Quality-of-Service databook state that
receive and transmit descriptor list address and also transmit and
receive tail pointer registers should be initialized before the receive
and transmit DMAs are started.
It also state to enable the MAC receiver only after the DMA is active.
Otherwise, received frames can fill the Rx FIFO and overflow.
Move the activation of receive and transmit DMA and MAC receiver until
after tail pointer registers have been initialized.
Signed-off-by: Jonas Karlman <[email protected]>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/dwc_eth_qos.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index 08332210afb..b104d4e4725 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -1003,14 +1003,6 @@ static int eqos_start(struct udevice *dev) writel(EQOS_DESCRIPTORS_RX - 1, &eqos->dma_regs->ch0_rxdesc_ring_length); - /* Enable everything */ - setbits_le32(&eqos->dma_regs->ch0_tx_control, - EQOS_DMA_CH0_TX_CONTROL_ST); - setbits_le32(&eqos->dma_regs->ch0_rx_control, - EQOS_DMA_CH0_RX_CONTROL_SR); - setbits_le32(&eqos->mac_regs->configuration, - EQOS_MAC_CONFIGURATION_TE | EQOS_MAC_CONFIGURATION_RE); - /* * Point TX tail pointer at the first descriptor, implying no descriptor * are owned by the DMA. We advance the tail pointer when we need to TX @@ -1026,6 +1018,14 @@ static int eqos_start(struct udevice *dev) addr64 = (ulong)eqos_get_desc(eqos, EQOS_DESCRIPTORS_RX - 1, true); writel(lower_32_bits(addr64), &eqos->dma_regs->ch0_rxdesc_tail_pointer); + /* Enable everything */ + setbits_le32(&eqos->dma_regs->ch0_tx_control, + EQOS_DMA_CH0_TX_CONTROL_ST); + setbits_le32(&eqos->dma_regs->ch0_rx_control, + EQOS_DMA_CH0_RX_CONTROL_SR); + setbits_le32(&eqos->mac_regs->configuration, + EQOS_MAC_CONFIGURATION_TE | EQOS_MAC_CONFIGURATION_RE); + eqos->started = true; debug("%s: OK\n", __func__); |