diff options
| author | Tom Rini <[email protected]> | 2022-03-18 16:37:39 -0400 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2022-03-18 16:37:39 -0400 |
| commit | 9776c4e9d00ac49d6388ffe9e084ff03b37ae479 (patch) | |
| tree | 1caed0c41ab5ba2c4a1772f4a5534d20ca7af579 /drivers | |
| parent | e7fb67df319cec410c20906bbf33936a6f7479b2 (diff) | |
| parent | 861682b596b81f988d522edd4c1c76341de112a2 (diff) | |
Merge tag 'u-boot-rockchip-20220318' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Fix for chromebook gru and bob board;
- some fix on driver like dram and saradc;
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/adc/rockchip-saradc.c | 2 | ||||
| -rw-r--r-- | drivers/ram/rockchip/sdram_rk3188.c | 2 | ||||
| -rw-r--r-- | drivers/ram/rockchip/sdram_rk3288.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/drivers/adc/rockchip-saradc.c b/drivers/adc/rockchip-saradc.c index e464d33f226..e0cbab6aa06 100644 --- a/drivers/adc/rockchip-saradc.c +++ b/drivers/adc/rockchip-saradc.c @@ -131,7 +131,7 @@ int rockchip_saradc_of_to_plat(struct udevice *dev) } priv->data = data; - uc_pdata->data_mask = (1 << priv->data->num_bits) - 1;; + uc_pdata->data_mask = (1 << priv->data->num_bits) - 1; uc_pdata->data_format = ADC_DATA_FORMAT_BIN; uc_pdata->data_timeout_us = SARADC_TIMEOUT / 5; uc_pdata->channel_mask = (1 << priv->data->num_channels) - 1; diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c index d9ed8adfcfd..be8ba4464d4 100644 --- a/drivers/ram/rockchip/sdram_rk3188.c +++ b/drivers/ram/rockchip/sdram_rk3188.c @@ -762,7 +762,7 @@ static int sdram_init(struct dram_info *dram, * CS1, n=2 * CS0 & CS1, n = 3 */ - sdram_params->ch[channel].rank = 2, + sdram_params->ch[channel].rank = 2; clrsetbits_le32(&publ->pgcr, 0xF << 18, (sdram_params->ch[channel].rank | 1) << 18); diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c index f3e4a2808ab..227a3cc6a88 100644 --- a/drivers/ram/rockchip/sdram_rk3288.c +++ b/drivers/ram/rockchip/sdram_rk3288.c @@ -862,7 +862,7 @@ static int sdram_init(struct dram_info *dram, * CS1, n=2 * CS0 & CS1, n = 3 */ - sdram_params->ch[channel].rank = 2, + sdram_params->ch[channel].rank = 2; clrsetbits_le32(&publ->pgcr, 0xF << 18, (sdram_params->ch[channel].rank | 1) << 18); |